cPCI-9116®/cPCI-9116R® 64 Ch, 16 bit, 250KS/s Analog input Card For 3U CompactPCI User’s Guide Recycled Paper
©Copyright 2002 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 1.10: April 28, 2003 Part No: 50-15002-101 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents Tables..........................................................................................................iv Figures .........................................................................................................v Outline of Chapters....................................................................................vi Chapter 1 Introduction................................................................................1 1.1 Features..........................................
Chapter 5 Operation Theory.....................................................................34 5.1 A/D Conversion.................................................................................34 5.1.1 A/D Conversion Procedure..................................................34 5.1.2 Software conversion with polling data transfer acquisition mode (Software Polling) ......................................................35 5.1.3 Programmable scan acquisition mode.................................36 5.1.
6.9 AD one-shot scan data acquisition with DMA transfer functions .......69 6.9.1 _9116_AD_DMA_Start ........................................................69 6.9.2 _9116_AD_DMA_Status .....................................................70 6.9.3 _9116_AD_DMA_Stop ........................................................71 6.10 AD one-shot scan data acquisition with interrupt- transfer functions.72 6.10.1 _9116_AD_INT_Start ..........................................................72 6.10.
Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. iv • Tables Legend of J1 Connector ......................................................15 I/O Port Address ..................................................................20 Timer/Counter Register Address .........................................21 General Purpose Timer/Counter Register ...........................
Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: PCB Layout of the cPCI-9116 .............................................10 PCB Layout of cPCI-9116R and Rear I/O adaptor ..............11 J1 Pin Assignments .............................................................
Outline of Chapters This manual is designed to help you use the 9116 series. The manual describes how to modify various settings on the card to meet your requirements. It is divided into seven chapters: Chapter1, “Introduction”, gives an overview of the product features, applications, and specifications. Chapter 2, “Installation”, describes how to install the 9116 series. The layout of 9116 series is shown.
1 Introduction The cPCI-9116 series products are advanced data acquisition cards based on the 32-bit CompactPCI architecture. The 9116 series include: • cPCI-9116: 16-bit 250KHz DAS card for 3U CompactPCI • cPCI-9116R: 16-bit 250KHz DAS card for 3U CompactPCI with Rear I/O connector The 9116 series DAS cards use state-of-the-art technology making it an ideal for data logging and signal analysis applications in medical, process control, etc.
1.
1.3 ♦ Specifications Analog Input (A/D) • Converter: LT1606 (or equivalent) 250KHz • Number of channels: (programmable) 3 64 single-ended (SE) 3 32 differential input (DI) 3 Mixing of SE and DI analog signal between channel allowed • A/D Data FIFO Buffer Size: 1024 locations • Channel Gain Queue Length: 512 words configurations • Resolution: 16-bit • Input Range: (Controlled by Channel Gain Queue) 3 Bipolar: ± 5V, ±2.5V, ±1.25V, ±0.625V 3 Unipolar: 0~10V, 0~5V, 0~2.5V, 0~1.
• Trigger Mode: 3 Software-trigger. 3 Pre-trigger. 3 Post-trigger. 3 3 Middle-Trigger. Delay Trigger • Data Transfer: 3 Polling. 3 EOC interrupt transfer. 3 FIFO half-full Interrupt transfer. 3 Bus-mastering DMA. • Data Throughput: 250KHz (maximum) ♦ Digital I/O (DIO) • Channel: 8 TTL compatible digital inputs and outputs • Input Voltage: 3 Low: VIL=0.8 V max. IIL=0.2mA max. 3 High: VIH=2.0V max. IIH=0.02mA max • Output Voltage: ♦ 3 Low: VOL=0.5 V max. IOL=8mA max. 3 High: VOH=2.
♦ General Specifications • Connector: 100-pin D-type SCSI-II connector • Operating Temperature: 0° C ~ 60° C • Storage Temperature: -20° C ~ 80° C • Humidity: 5 ~ 95%, non-condensing • Power Consumption: 3 +5V @ 560mA typical 3 +3.
1.4 Software Support ADLINK provides versatile software drivers and packages for users’ different approach to building a system. We not only provide programming libraries such as DLL for many Windows systems, but also provide drivers for other software packages such as LabVIEW®. All software options are included in the ADLINK CD. Non-free software drivers are protected with licensing codes. Without the software code, you can install and run the demo version for two hours for trial/demonstration purposes.
1.4.3 DAQBenchTM: ActiveX Controls We suggest customers who are familiar with ActiveX controls and VB/VC++ programming use the DAQBenchTM ActiveX Control component library for developing applications. The DAQBenchTM is designed under Windows NT/98. For more information about DAQBench, please refer to the user’s guide in the CD. (\\Manual_PDF\Software\DAQBench\DAQBench Manual.PDF).
2 Installation This chapter describes how to install the 9116 series cards. The contents of the package and unpacking information that you should be aware of are described first. The 9116 series cards perform an automatic configuration of the IRQ, port address, and BIOS address. You do not need to set these configurations, as you would do in ISA form factor DAS cards. Automatic configuration allows your system to operate more reliable and safe. 2.
2.2 Unpacking The card contains electro-static sensitive components that can be easily be damaged by static electricity. Therefore, the card should be handled on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damages. Shipping and handling may cause damage to your module. Be sure there are no shipping and handling damages on the modules carton before continuing.
2.
Figure 2: PCB Layout of cPCI-9116R and Rear I/O adaptor Installation • 11
2.4 1. PCI Configuration Plug and Play: As a plug and play component, the board requests an interrupt number via a system call. The system BIOS responds with an interrupt assignment based on the board information and on known system parameters. These system parameters are determined by the installed drivers and the hardware load seen by the system. 2. Configuration: The board configuration is done on a board-by-board basis for all PCI form factor boards on your system.
3 Signal Connections This chapter describes the connectors of the 9116 series. The signal connections between the 9116 series cards and external devices are also outlined. 3.1 Connectors and Pin Assignment The cPCI-9116 is equipped with one 100-pin SCSI-type connector (J1). J1 is used for digital input/output, analog input, and timer/counter signals. The pin assignment for the connector is illustrated in the Figure 3.1.
3.1.
3.1.
3.2 Analog Input Signal Connection The 9116 series provides up to 64 single-ended or 32 differential analog input channels. You can set and fill the Channel Gain Queue to get the desired combination of the input signal types. The analog signals can be converted to digital value by the A/D converter.
Differential input mode The differential input mode provides two inputs that respond to signal voltage differences between them. If the signal source is ground- referenced, the differential mode can be used for common-mode noise rejection. Figure 5 shows the connection of ground-referenced signal sources under differential input mode. x = 0, ...
User Common Mode (U_CMMD) To measure ground-referenced signal sources, which are connected to the same ground point, you can connect the signals in a User-Common-Mode (U_CMMD) configuration. Fig 7 illustrates the connections. The signal local ground reference is connected to the negative input of the instrumentation Amplifier, and the common-mode ground potential to signal ground. The instrumentation amplifier will now reject the 9116 series ground.
4 Registers The descriptions of the registers and structure of the cPCI-9116 are outlined in this chapter. The information in this chapter will assist programmers, who wish to handle the card with low-level programs. In addition, the low level programming syntax is introduced. This information can help beginners to operate the cPCI-9116 in the shortest possible time. 4.1 I/O Port Address The 9116 series card functions as a 32-bit PCI master device to any master on the PCI bus.
I/O Address Read Write Base + 0x00 Scan Interval Counter Scan Interval Counter Base + 0x04 Sample Interval Counter Sample Interval Counter Base + 0x08 Scan Counter Scan Counter Base + 0x0C DIV Counter DIV Counter Base + 0x10 Delay1 Counter Delay1 Counter Base + 0x14 M Counter M Counter Base + 0x18 GP Counter/Timer 0 GP Counter/Timer 0 Base + 0x1C X X Base + 0x20 X GP Counter/Timer Control Reg Base + 0x24 A/D FIFO Data Reg Config. Channel Gain Queue Reg..
4.2 Internal Timer/Counter Register The 9116 series card basically has 6 counters, which are responsible for the scan timing of the analog input data acquisition. The 6 counters occupy 6 I/O address locations in the 9116 card as shown below.
4.3 General Purpose Timer/Counter Register One 16-bit, general-purpose timer/counter exists in the 9116 series card. Writing to this register loads the initial count value into the general-purpose timer/counter.
Counter en (bit7): GPTC0 count enable 1: enable GPTC0 0: disable GPTC0 UpDown (bit6): GPTC0’s up/down pin software control 1: Up counter 0: Down counter UpDown src(bit5): GPTC0’s up/down pin selection bit 1: External input (Pin 98) 0: Software Control Gate_src (bit4): GPTC0’s gate source 1: External Input (Pin 97) 0: gate controlled by setting the enable (bit7) Clk_src (bit3): GPTC0’s clock source 1: External Input (Pin 96) 0: Internal Timebase MODE1~MODE0 (bit1 ~ bit0): GPTC0’s Mode selection MODE1
4.5 A/D Data Registers The digital converted data is 16-bits and is stored into 32-bit registers. Address: BASE +24 Attribute: read Data Format: Bit 7 6 5 4 3 2 1 0 Bit AD7 15 AD6 14 AD5 13 AD4 12 AD3 11 AD2 10 AD1 9 AD0 8 Bit AD15 23 AD14 22 AD13 21 AD12 20 AD11 19 AD10 18 AD9 17 AD8 16 Bit --31 --30 --29 --28 --27 --26 --25 --24 --- --- --- --- --- --- --- --- Table 7. A/D Data Registers AD15 ~ AD0: Analog to digital data.
CH3 ~ CH0 (bit11~ bit8): Internal A/D Channel selection bits EN3 ~ EN0 (bit7~ bit4): Multiplexer Enable selection bits Gain1~Gain0 (bit13~bit12): Gain selection bits Gain1 Gain0 Gain 0 0 1 0 1 2 1 0 4 1 1 8 Table 9.
4.7 A/D & FIFO Control Register Address: BASE + 28 Attribute: Write Data Format: Bit 7 6 5 4 3 2 1 0 Bit 15 Clear Channel Gain Queue 14 13 12 11 10 9 8 Bit --23 --22 --21 --20 --19 --18 --17 DMA 16 Bit --31 --30 --29 --28 --27 --26 --25 --24 --- --- --- --- --- --- --- --- SC_dis Set Clear Clear Clear Clear done DFIFO Trg_det SC_TC ADOR Table 10. A/D & FIFO Control Register DMA (Bit8): Write Only. Set for DMA transfer SC_dis (Bit7): Write Only.
Write 1 to clear the trigger status: 0: no effect 1: clear trigger detect status Clear SC_TC(Bit2) : Write 1 to clear Write 1 to clear Scan Counter Terminal Count status 0: no effect 1: clear the SC_TC status Clear ADOR(Bit1) : Write 1 to clear Write 1 to clear the A/D Overrun Status 0: no effect 1: clear the A/D Overrun status Clear ADOS(Bit0) : Write 1 to clear Write 1 to clear the A/D Over Speed Status: 0: no effect 1: clear the A/D Over-Speed status 4.
ACQ (Bit7): Read Only, set when acquisition is in progress.
4.9 Digital I/O register There are 8 digital input and 8 digital output channels provided by the 9116 series cards. The address Base + 30 is used to access digital inputs and control digital outputs.
4.
TimeBase(bit5) : The Timebase Selection of 9116 series 1: External Timebase 0: Internal Timebase (24 MHz) TrgP (bit4): The Trigger polarity selection bit 1: Negative Edge Trigger 0: Positive Edge Trigger MODE2 ~ 0(bit3 ~ bit1): Trigger Mode Selection Bits MODE2 MODE1 MODE0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 Description Software Trigger Post Trigger Delay Trigger Pre Trigger Middle Trigger Table 15. Trigger Mode Selection Bits 4.
SCTC_en (bit11): Trigger Complete Interrupt Enable Control 1: Enable 0: Disable Hfull_en (bit10): A/D FIFO Half Full Interrupt Enable Control 1: Enable 0: Disable DTrg_en (bit9): External Digital Trigger Interrupt Enable Control 1: Enable 0: Disable EOC_en (bit8): End of conversion Interrupt Enable Control 1: Enable 0: Disable Clr_Timer (bit4): write 1 to clear the GPTC Interrupt status 1: clear interrupt from the GPTC 0: no effect Clr_SCTC (bit3): write 1 to clear the SCTC Interrupt 1: clear the i
4.12 Interrupt Status Register Address: BASE + 0x38 Attribute: read Data Format: Bit 7 --- Bit 15 Bit --23 Bit 6 5 4 3 2 1 0 --- --- Timer STTC Hfull DTrg EOC 14 13 12 11 10 9 8 --22 --21 --20 --19 --18 --17 --16 --31 --30 --29 --28 --27 --26 --25 --24 --- --- --- --- --- --- --- --- Table 17.
5 Operation Theory The operation theory of the functions on the 9116 series is described in this chapter. The functions include the A/D conversion, Digital I/O and General Purpose Counter / Timer. The operation theory can help you better understand how to configure and program the 9116 series card. 5.1 5.1.1 A/D Conversion A/D Conversion Procedure When using an A/D converter, users should beware of the properties of the signal to be measured.
5.1.2 Software conversion with polling data transfer acquisition mode (Software Polling) This is the easiest way to acquire a single A/D data. The A/D converter starts a conversion when the user writes 1 into bit10 of the A/D trigger mode register (BASE+34). After the software initializes the A/D conversion, the software polls the FIFO Empty status (bit4) in the A/D & FIFO Status register (BASE+28) until it changes to active low logic.
5.1.2.1 Specifying Channels, Gains, and input configurations in the Channel Gain Queue In both Software Polling and programmable scan acquisition mode, the channel, gain, and input configuration (single-end, differential, and U_CMMD), where you want to acquire samples from, can be specified in the Channel Gain Queue. You can set the channel number in the Channel Gain Queue in any order.
Timebase clock source In scan acquisition mode, all the A/D conversions start on the output of counters, which use Timebase as the clock source. With the software you can specify the Timebase to be either an internal clock source (on board 24MHz) or an external clock input on pin 45 of J1. The external clock is useful when you want to acquire data at rates not available with the internal A/D sample clock.
Note: 1. The maximum A/D sampling rate is 250kHz. Therefore, SI2_counter can’t be smaller than 96 while using the internal Timebase. 2. The SI_counter is a 24-bit counter and the SI2_counter is a 16-bit counter. Therefore, the maximum scan interval while using the internal Timebase = 24 2 /24M s = 0.699s, and the maximum sampling interval between 2 16 channels while using the internal Timebase = 2 /24M s = 2.73ms. 3.
Then Acquisition sequence of channels: 1, 2, 0, 2, 1, 2, 0, 2, 1, 2, 0, 2. Sampling Interval = 240/24M s = 10 us Scan Interval = 960/24M s = 40 us Equivalent sampling rate of ch0, ch1: 25kHz Equivalent sampling rate of ch2: 50kHz 5.1.3.3 Trigger Modes There are 5 trigger modes (software-trigger, pre-trigger, post-trigger, middle-trigger, and delay-trigger) to start the data acquisition described in 5.3.1.1. All but software trigger are external digital triggers.
(M_counter = M = 3, DIV_counter=4, SC_counter=0) ExtTrg(pin46) Scan_start AD_conversion Scan_in_progress (SSH_OUT)(pin47) Acquisition_in_progress Aquired data Acquired & stored data (M scans) Operation start Figure 10: Pre-trigger (trigger occurs after M scans) Note: If an external trigger event occurs when a scan is in progress, the data acquisition won’t stop until this scan completes, and the stored M scans of data include the last scan.
When an external trigger signal occurs before the first M scans of data are converted, the amount of stored data could be fewer than the originally specified amount of DIV_counter * M_counter, as illustrated in fig 12. This situation can be avoided by setting M_enable. If M_enable is set to 1, the trigger signal will be ignored until the first M scans of data are converted, and it assures user of obtaining M scans of data under pre-trigger mode, as illustrated in fig 13.
(M_counter = M = 3, DIV_counter=4, SC_counter=0) The first M scans Trigger signals which occur in the shadow region(the first M scans) will be ignored ExtTrg(pin46) Scan_start AD_conversion Scan_in_progress (SSH_OUT)(pin47) Acquisition_in_progress Aquired data Acquired & stored data (M scans) Operation start Figure 13: Pre-trigger with M_enable = 1 Note: The SC_counter must be set to 0 in pre-trigger acquisition mode.
(M_Counter=M=3, DIV_Counter=4, SC_Counter=N=1) The first M scans Trigger signals which occur in the shadow region(the first M scans) will be ignored ExtTrg(pin46) Scan_start AD_conversion Scan_in_progress (SSH_OUT)(pin47) Acquisition_in_progress Aquired data M scans before trigger Operation start N scans after trigger Acquired & stored data (M+N scans) Figure 14: Middle trigger with M_enable = 1 If an external trigger event occurs when a scan is in progress, the stored N scans of data would include thi
(M_Counter=M=2, DIV_Counter=4, SC_Counter=N=2) Trigger occurs when a scan is in progress ExtTrg(pin46) Scan_start AD_conversion Scan_in_progress (SSH_OUT)(pin47) Acquisition_in_progress Acquired data M scans before trigger Operation start N scans after trigger Acquired & stored data (M+N scans) Figure 15: Middle trigger (trigger with scan is in progress) Post-Trigger Acquisition Use post-trigger acquisition in applications where you want to collect data after an external trigger event.
Delay Trigger Acquisition Use delay trigger acquisition in applications where you want to delay the data collection after the occurrence of a specified trigger event. The delay time is controlled by the value, which is pre-loaded in the Delay_counter (16bit). The counter counts down on the rising edge of Delay_counter clock source after the trigger condition is met. The clock source can be software programmed either Timebase clock (24MHz) or A/D sampling clock (Timebase /SI2_counter).
Post-Trigger or Delay-trigger Acquisition with re-trigger Use post-trigger or delay-trigger acquisition with re-trigger function in applications where you want to collect data after several external trigger events. The number of scans after each trigger is specified in SC_counter, and users could program Retrig_no to specify the number of re-triggers. Fig 18 illustrates an example.
5.1.4 A/D Data Transfer Modes After the end of the A/D conversion, A/D data are buffered into the Data FIFO memory. The FIFO size on the 9116 series card is 1024 (1K) words. If the sampling rate is 10 KHz, the FIFO can buffer 102.4 ms of analog signal. After the FIFO is full, any data after this time will be lost. The data must be transferred to the host memory after the data is ready and before the FIFO is full. In scan acquisition mode, there are 3 data transfer modes that can be used.
DMA Transfer PCI bus-mastering DMA is necessary for high speed DAQ in order to utilize the maximum PCI bandwidth. The bus-mastering controller, which is built-in into the AMCC-5933 PCI controller, controls the PCI bus when it becomes the master on the bus. Bus mastering reduces the size of the on-board memory and reduces the CPU loading because data is directly transferred to the computer’s memory without host CPU intervention. Bus-mastering DMA provides the fastest data transfer rates on PCI-bus.
5.3 General Purpose Timer/Counter Operation An independent 16-bit up/down timer/counter is designed in the FPGA for user applications. Fig 19 shows a simplified model of the timer/counter on the 9116 series card.
Mode 0: Interrupt on Terminal Count Mode 0 is typically used for event counting, as illustrated in fig 20. After the initial count is written, OUT is initially low, and will remain low until the Counter counts to zero. OUT then goes high and will remain high until a new count is written into the Counter.
6 C/C++ Library This chapter describes the software library for operating this card. Only the functions in DOS library are described. Please refer to the PCIS-DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions. The function prototypes and some useful constants are defined in the header files LIB directory (DOS). 6.
6.2 Programming Guide 6.2.1 Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software driver are using full-names to represent the functions' real meaning. The naming convention rules are: In DOS Environment : _{hardware_model}_{action_name}. e.g. _9116_initial(). 6.2.2 Data Types We defined some data type in 9116.h (DOS). These data types are used by NuDAQ Cards’ library. We suggest that you use these data types in your application programs.
6.2.3 Sample Programs List (DOS) You can get sample programs once cPCI-9116 dos driver is installed.
6.3 Initial functions 6.3.1 _9116_Initial @ Description This function is used to initialize the cPCI-9116. Each cPCI-9116 card must be initialized with this function before calling other functions is permitted.
6.3.2 _9116_AD_Clr_DFIFO @ Description This function is used to clear the A/D Data FIFO. @ Syntax C/C++ (DOS) int _9116_AD_Clr_DFIFO( I16 card_number ) @ Argument card_number : the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4.
6.4 DIO functions 6.4.1 _9116_DI @ Description This function is used to read data from the digital input port. There are 8 digital input channels on the cPCI_9116. All 8 channels can be accessed using this function.
6.5 AD Channel Gain Queue configuration functions 6.5.1 _9116_AD_Clr_CFIFO @ Description This function is used to reset the A/D Channel Gain Queue (Refer to 5.1.2.1 for definition of Channel Gain Queue). Before calling the _9116_AD_Set_CFIFO function to set the A/D channel and input range, this function must be call to clear the A/D Channel Gain Queue.
6.5.2 _9116_AD_Set_CFIFO @ Description This function is used to specify the A/D channel and the input range. Note: _9116_AD_Clr_CFIFO should be called before you use this function to set the channels and gains in the Channel-Gain Queue. After the settings are completed, you have to call _9116_AD_CFIFO_SetDone to stop filling out the Channel-Gain Queue.
AD_INPUT GAIN AD_B_5_V AD_B_2_5_V AD_B_1_25_V AD_B_0_625_V AD_U_10_V AD_U_5_V AD_U_2_5_V AD_U_1_25_V 1 2 4 8 1 2 4 8 Diff: cmmd_sel: Input type (Bipolar or Unipolar) Bipolar Bipolar Bipolar Bipolar Unipolar Unipolar Unipolar Unipolar Input Range ±5V ±2.5V ±1.25V ±0.625V 0V ~ 10V 0V ~ 5V 0V ~ 2.5V 0V ~ 1.
6.5.3 _9116_AD_CFIFO_SetDone @ Description This function is used to stop setting A/D channel gain queue.
6.6 AD Software-Polling functions 6.6.1 _9116_AD_Acquire @ Description This function is used to poll the A/D converted data. It will trigger an A/D conversion, and read the A/D data when the data is ready. To perform a software-polling data acquisition, users must set the Channel Gain Queue using functions in 6.5, and then performing this function will retrieve the data in the order the Channel Gain Queue has been set. Refer to the sample program AD_DEMO0.C.
6.7 AD Trigger control functions 6.7.1 _9116_AD_Trig_Ctrl _9116_AD_Set_TrigMode _9116_AD_Set_TrigPol _9116_AD_Set_Timebase _9116_AD_Set_Delay_SRC _9116_AD_Set_M_enable @ Description These functions are used to set the AD trigger controls. The _9116_AD_Trig_Ctrl() function provides settings for all trigger parameters, while the other functions provide individual settings for each trigger parameter.
Trig_pol: Timebase_sel: Delay_src: retrig_en: M_enable: ACQ_enable: trigger polarity setting: RISE_TRIG (or 0): rising edge trigger FALL_TRIG (or 1): falling edge trigger Timebase source selection. Refer to 5.1.3.1 for details. INT_TIMEBASE (or 0): internal timebase (24MHz) EXT_TIMEBASE (or 1): external timebase from pin45 Delay source selection in delay-trigger mode. Refer to 5.1.3.3 for details.
6.8 AD Counter setting functions These functions are for the setting of the counter values when using programmable scan acquisition mode. Refer to Chapter 5 for definition of each counter. 6.8.1 _9116_AD_Set_SC @ Description Set SC_Counter value for programmable scan acquisition mode.
6.8.2 _9116_AD_Set_SI @ Description Set SI_Counter value for programmable scan acquisition mode. @ Syntax C/C++ (DOS) int _9116_AD_Set_SI( I16 card_number, U32 counter_value ) @ Argument card_number: Counter_value: the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4. the SI_Counter value. Range: 96 through to 16777215 @ Return Code ERR_NoError ERR_BoardNoInit 6.8.
6.8.4 _9116_AD_Set_DIV @ Description Set DIV_Counter value for programmable scan acquisition mode. Refer to Chapter 5 for definition of DIV_Counter @ Syntax C/C++ (DOS) int _9116_AD_Set_DIV( I16 card_number, U32 counter_value ) @ Argument card_number: Counter_value: the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4 the DIV_Counter value. Range: 1 through to 512 @ Return Code ERR_NoError ERR_BoardNoInit 6.8.
6.8.6 _9116_AD_Set_M @ Description Set M_Counter value when pre-trigger or middle-trigger mode is selected. @ Syntax C/C++ (DOS) int _9116_AD_Set_M( I16 card_number, U32 counter_value ) @ Argument card_number: Counter_value: the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4 the M_Counter value.
6.8.7 _9116_AD_Set_Retrig @ Description Set the number of re-trigger counts when post-trigger or delay-trigger mode is selected. @ Syntax C/C++ (DOS) int _9116_AD_Set_Retrig( I16 card_number, I16 retrig_en, U16 retrig_no); @ Argument card_number: retrig_en: retrig_no: @ Return Code ERR_NoError ERR_BoardNoInit 68 • C++ Library the card number of cPCI-9116 to be initialized, totally 4 cards can be initialized, the valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4.
6.9 AD one-shot scan data acquisition with DMA transfer functions These functions are used to start scan data acquisition with DMA transfer according to the selected trigger mode and conditions. 6.9.1 _9116_AD_DMA_Start @ Description This function will perform programmable scan data acquisition with DMA data transfer using the pacer trigger. It takes place in the background and will not stop until the completion of all conversions or the execution of _9116_AD_DMA_Stop() function to stop the process.
@ Return Code ERR_NoError ERR_BoardNoInit, ERR_InvalidADChannel, ERR_InvalidTimerValue ERR_AD_InvalidGain 6.9.2 _9116_AD_DMA_Status @ Description Since the _9116_AD_DMA_Start() function runs in the background, this function can be used to check its operation status.
6.9.3 _9116_AD_DMA_Stop @ Description This function is used to stop the DMA data transfer and obtain the start index of the data buffer when pre-trigger or middle-trigger is selected. @ Syntax C/C++ (DOS) int _9116_AD_DMA_Stop( I16 card_number, U32 *count, U32 *start_idx ) @ Argument card_number: Count: start_idx: the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4.
6.10 AD one-shot scan data acquisition with interrupttransfer functions These functions are used to start scan data acquisition with interrupt-transfer according to the selected trigger mode and conditions. Note that these functions cannot be applied to pre-trigger and middle-trigger mode. 6.10.1 _9116_AD_INT_Start @ Description This function will perform programmable scan data acquisition with interrupt transfer by using the pacer trigger.
Mode: EOC or Half-full interrupt transfer mode selection 0: EOC interrupt transfer mode 1: Half-full interrupt transfer mode @ Return Code ERR_NoError ERR_BoardNoInit, ERR_InvalidADChannel, ERR_InvalidTimerValue ERR_AD_InvalidGain 6.10.2 _9116_AD_INT_Status @ Description Since the _9116_AD_INT_Start() function runs in the background, this function can be used to check its operation status.
6.10.3 _9116_AD_INT_Stop @ Description This function is used to stop the interrupt data being transferred. @ Syntax C/C++ (DOS) int _9116_AD_INT_Stop( I16 card_number, U32 *count) @ Argument card_number: Count: @ Return Code ERR_NoError ERR_BoardNoInit 74 • C++ Library the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4. the number of A/D converted data that has been transferred.
6.11 AD continuous scan data acquisition double-buffered DMA transfer functions with These functions are used to perform continuous scan data acquisition with double-buffered DMA data transfer. It takes place in the background and will not stop until the execution of _9116_AD_DMA_Stop() function to stop the process. (Note these functions do not apply to pre-trigger and middle-trigger mode.) Refer to the sample program AD_DEMO10.C. 6.11.
6.11.2 _9116_DblBufferTransfer @ Description Using this function to copy the converted A/D data from the circular to transfer buffer. @ Syntax C/C++ (DOS) int _9116_DblBufferTransfer(I16 card_number, U32 far *user_buffer) @ Argument card_number: userBuffer : @ Return Code ERR_NoError ERR_BoardNoInit 76 • C++ Library the card number of the cPCI-9116 to be initialized, totally 4 cards can be initialized, valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4.
6.11.3 _9116_GetOverrunStatus @ Description When you perform continuous scan data acquisition with double-buffered mode DMA transer but you do not use _9116_DblBufferTransfer() to copy converted data then circular buffer overrun will occur. You can use this function to check overrun counts.
@ Return Code ERR_NoError ERR_BoardNoInit 6.12.2 _9116_GP0_Set_Count @ Description This function is used to set the initial count value of GPTC @ Syntax C/C++ (DOS) int _9116_GP0_Set_Count ( I16 card_number, U16 GP_value ) @ Argument card_number: GP_value: the card number of cPCI-9116 to be initialized, totally 4 cards can be initialized, the valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4. 16-bit count initial value @ Return Code ERR_NoError ERR_BoardNoInit 6.12.
6.12.4 _9116_GP0_Set_GATE_SRC @ Description This function is used to select the gate source of GPTC. When internal gate source is selected, you can use function _9116_GP0_EN to enable/disable the counting. @ Syntax C/C++ (DOS) int _9116_GP0_Set_GATE_SRC( I16 card_number, U8 gate_src ) @ Argument card_number: gate_src : the card number of cPCI-9116 to be initialized, totally 4 cards can be initialized, the valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4.
@ Return Code ERR_NoError ERR_BoardNoInit 6.12.6 _9116_GP0_Set_UPDOWN @ Description This function is used to select up/down operation of GPTC when internal up/down source is selected. @ Syntax C/C++ (DOS) Int _9116_GP0_Set_UPDOWN(I16 card_number, U8 updown) @ Argument card_number: Updown: the card number of cPCI-9116 to be initialized, totally 4 cards can be initialized, the valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4. 0: count down 1: count up @ Return Code ERR_NoError ERR_BoardNoInit 6.12.
@ Return Code ERR_NoError ERR_BoardNoInit 6.12.8 _9116_GP0_Read_Count @ Description This function is used to read back the counter value of GPTC. @ Syntax C/C++ (DOS) Int _9116_GP0_Read_Count( I16 card_number, U16 *GP_value) @ Argument card_number: Gp_value: the card number of cPCI-9116 to be initialized, totally 4 cards can be initialized, the valid card numbers are CARD_1, CARD_2, CARD_3, CARD_4.
7 Software Utility & Calibration This software CD provides a utility program, 9116util.exe, and is intended for: Calibration and Functional Testing. This utility is a menu-driven design and operates under the DOS environment. The text messages gives operating guidance, with graphics to indicate correct hardware configuration and location. The utility is described in the following sections. Note that the software driver for the cPCI-9116 and cPCI-9116R are the same. 7.1 Running 9116util.
****** cPCI-9116 Utility Rev. 1.0 ****** Copyright © 2001-2002, ADLINK Technology Inc. All rights reserved. : Calibration. : Function testing. : Quit. >>> Select function key F1 ~ F2, or press to quit. <<< Figure 22: CPCI-9116 Utility Main Screen 7.2 Calibration In data acquisition processes, calibration of the measurement devices is very important to maintain its accuracy.
7.2.2 VR Assignment There are 4 variable resistors (VR) on the 9116 series board that allows you to make adjustments to the A/D channels. The function of each VR is specified in Table 18. VR1 VR2 VR3 VR4 A/D unipolar offset adjustment A/D bipolar offset adjustment A/D full scale adjustment PGA offset adjustment Table 18. Functions of VRs 7.2.3 A/D Adjustment When you choose the calibration function from the main menu list, a calibration items menu is displayed on the screen.
7.2.3.1 PGA offset Calibration 1. Short the A/D channel 0 (pin 2 of J1) to ground (pin51 of J1). 2. Use multi-meter to measure the voltage between TP1 and TP2 on board. 3. Adjust VR4 to obtain the multi-meter value as close as possible to 0V. 7.2.3.2 Bipolar input Calibration 1. Calibrate the PGA offset as described in 7.2.3.1. 2. Connect A/D channel 0 (pin 2 of J1) to ground (pin 51 of J1), and Applied a precise +5V to A/D channel 1 (pin 3 of J1). 3.
****** cPCI-9116 Function Testing ****** <0> : DI/DO Test <1> : A/D with Polling Test (ch0~31) <2> : A/D with Polling Test (ch32~63) <3> : A/D with Interrupt Test <4> : A/D with DMA Test <5> : A/D with DMA & pre-trigger <6> : A/D with DMA & mn-trigger <7> : A/D with DMA & post-trigger <8>: A/D with DMA & delay-trigger with retrigger=3 <9> : A/D with continuous DMA(Double buffer mode) : Quit.
Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully. 1. Before using ADLINK’s products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from: http://rma.adlinktech.com/policy/. 2. All ADLINK products come with a limited two-year warranty, one year for products bought in China.
• Damage caused by inappropriate storage environments such as with high temperatures, high humidity, or volatile chemicals. • Damage caused by leakage of battery fluid during or after change of batteries by customer/user. • Damage from improper repair by unauthorized ADLINK technicians. • Products with altered and/or damaged serial numbers are not entitled to our service. • This warranty is not transferable or extendible. • Other categories not protected under our warranty. 4.
