ETX-BT User’s Manual Manual Revision: 1.
Revision History Page 2 Revision Description Date By 1.00 Initial release 2015-03-18 JC 1.
Preface Copyright 2015 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.
Table of Contents Revision History..................................................................................2 Preface ..............................................................................................3 1 Introduction ....................................................................................7 1.1 Description ..................................................................................................................... 7 2 Specifications ..................................
6.8 6.9 6.10 6.11 SW1: SPI Boot Device Selection.................................................................................. 35 SW2: BIOS Setup Defaults RESET Button .................................................................. 35 SW4: PCI Interrupt Routing Select............................................................................... 37 SW3: PCI Voltage Level Selection ...............................................................................
9.4 9.5 9.3.6 Network............................................................................................................................ 59 9.3.7 PCI................................................................................................................................... 59 9.3.8 Super IO .......................................................................................................................... 60 9.3.9 ACPI and Power Management .....................................
1 Introduction 1.1 Description The ETX-BT is based on the latest Intel® Atom™ processor E3800 SoC series, adopting the latest 22nm process technology with 3-D Tri-Gate transistors featuring significant improvements in computational performance and energy efficiency. The E3800 SOC series integrates processorand GPU cores and all I/O on a single chip. Processor performance is scalable from a single-core Intel® Atom™ processor E3815 at 1.4GHz to a quad-core Intel® Atom™ processor E3845 at 1.9GHz.
2 Specifications 2.1 General X CPU: Single, dual or quad-core Intel® Atom™ or Celeron® processor • • • • • • • Atom™ E3845 Atom™ E3827 Atom™ E3826 Atom™ E3825 Atom™ E3805 Atom™ E3815 Celeron® N2930 1.91 GHz 542/792 (Turbo) 10W (4C/1333) 1.75 GHz 542/792 (Turbo) 8W (2C/1333) 1.46 GHz 533/667 (Turbo) 7W (2C/1066) 1.33 GHz 533 (No Turbo) 6W (2C/1066) 1.33 GHz 533 (No Turbo, No Graphics) 4W (2C/1066) 1.46 GHz 400 (No Turbo) 5W (1C/1066) 1.83 GHz, 688/854 (Turbo) 7.
2.2 Video X Graphics Core: Intel 7th generation (Gen 7) graphics and media encode/decode engine (not supported on Atom™ E3805 SKU) X Feature Support: o VED video decoder in addition to Gen 7 media decoder o Graphics Burst enabled through energy counters o Supports DX 11, OpenGL 3.0 (OGL 3.0), OpenCL 1.1 (OCL 1.1), OpenGLES 2.0 (OGLES 2.0) o GPU shader capable of up to 8 gigaflops, 4x anti-aliasing o Full HW acceleration for decode of H.
2.4 Ethernet X Type: Intel® i211 (MAC/PHY) Ethernet controller X Interface: 10/100 Mbps on ETX signal connector (build option for 1000/100/10 Mbps via FPC connector on module, only one output can be active at a time) 2.5 Multi I/O and Storage X USB: 4 ports USB 2.0/1.
2.
2.8 Power X Standard Input: ATX = 5V±5% / 5Vsb ±5% or AT = 5V±5% X Management: ACPI 4.0 compliant, Smart Battery support X Power States: C0, C1, C1E, C4, C6; S0, S3, S4, S5 (Wake on USB S3/S4,WOL S3/S4/S5) X ECO mode: supports deep S5 (ECO mode) for power saving 2.9 Mechanical and Environmental X Form Factor : ETX Rev 3.
FPC 3 Functional Diagram Page 13
4 Mechanical Dimensions Top View Side View All tolerances ± 0.05 mm Other tolerances ± 0.
5 Pinouts and Signal Descriptions Crossed out signals are not supported. 3V (3.3 V ±5%) is generated on board. Pins may be used to power devices on the carrier board up to a maximum load of 500 mA. Do not connect the 3V pin to external 3.3V supply power. 5.
X1 Signal Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Signal GND GND PCICLK3 PCICLK4 GND GND PCICLK1 PCICLK2 REQ3# GNT3# GNT2# 3V REQ2# GNT1# 15 REQ1# 16 3V 17 18 19 20 GNT0# RESERVED 5VCC 5VCC 21 SERIRQ Serial Interrupt Reqest 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 REQ0# AD0 3V AD1 AD2 AD4 AD3 AD6 AD5 CBE0# AD7 AD8 AD9 GND GND AD10 AUXAL AD11 MIC AD12 AUXAR AD13 ASVCC AD14 SNDL AD15 ASGND CBE1# SNDR PCI Bus Request 0 PCI Address & Data Bus
Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Signal 5VCC 5VCC PAR SERR# GPERR# RESERVED PME# USB2N LOCK# DEVSEL# TRDY# USB3N IRDY# STOP# FRAME# USB2P GND GND AD16 CBE2# AD17 USB3P AD19 AD18 AD20 USB0N AD22 AD21 AD23 USB1N AD24 CBE3# 5VCC 5VCC AD25 AD26 AD28 USB0P AD27 AD29 AD30 USB1P PCIRST# AD31 INTC# INTD# INTA# INTB# GND GND Description Power +5V Power +5V PCI Bus Parity PCI Bus System Error PC
5.
X2 Signal Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Signal GND GND SD14 SD15 SD13 MASTER# SD12 DREQ7 SD11 DACK7# SD10 DREQ6 SD9 DACK6# SD8 DREQ5 MEMW# DACK5# MEMR# DREQ0 LA17 DACK0# LA18 24 IRQ14 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 LA19 IRQ15 LA20 IRQ12 LA21 IRQ11 LA22 IRQ10 LA23 IO16# GND GND SBHE# M16# SA0 OSC SA1 BALE SA2 TC SA3 DACK2# SA4 IRQ3 SA5 IRQ4 Description Ground Ground ISA Data Bus ISA Data Bus ISA Data Bus ISA 1
Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Page 20 Signal 5VCC 5VCC SA6 IRQ5 SA7 IRQ6 SA8 IRQ7 SA9 SYSCLK SA10 REFSH# SA11 DREQ1 SA12 DACK1# GND GND SA13 DREQ3 SA14 DACK3# SA15 IOR# SA16 IOW# SA18 SA17 SA19 SMEMR# IOCHRDY AEN 5VCC 5VCC SD0 SMEMW# SD2 SD1 SD3 NOWS# DREQ2 SD4 SD5 IRQ9 SD6 SD7 IOCHK# RSTDRV GND GND Description Power +5V Power +5V ISA Address Bus ISA Interrupt Request 5 ISA Address
5.
X3 Signal Descriptions Pin 1 2 3 4 5 6 7 Signal GND GND R B HSY G VSY Description Ground Ground Analog Video Out RGB - Red Ch Analog Video Out RGB - Blue Ch Horizontal Synchronization Pulse Analog Video Out RGB - Green Ch Vertical Synchronization Pulse Type PWR PWR OA OA O-3,3 OA O-3,3 PU/PD PD 150R PD 150R PD 150R - 8 DDCK Display Data Channel Clock IO-5 PU 2.2K to 5V 9 DETECT# Panel Hot-Plug Detection NC 10 DDDA Display Data Channel Data IO-5 PU 2.
Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Signal LPT | FLPY# RESERVED 5VCC GND STB# | RSV AFD# | DENSEL RESERVED PD7 | RSV IRRX ERR# | HDSEL# IRTX PD6 | RSV RXD2 INIT# | DIR# GND GND RTS2# PD5 | RSV DTR2# SLIN# | STEP# DCD2# PD4 | DSKCHG# DSR2# PD3 | RDATA# CTS2# PD2 | WP# TXD2 PD1 | TRK0# RI2# PD0 | INDEX# 5VCC 5VCC RXD1# ACK# | DRV RTS1# BUSY# | MOT DTR1# PE | WDATA# DCD1# SLCT#|WGATE# DSR1# M
5.
X4 Signal Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Signal GND GND 5V_SB PWGIN PS_ON SPEAKER PWRBTN# BATT KBINH LILED RSMRST# ACTLED ROMKBCS# SPDLED EXT_PRG I2CLK 5VCC 5VCC OVCR# GPCS# EXTSMI# I2DAT SMBCLK SMBDATA S_CS3# SMBALERT S_CS1# DASP_S S_A2 P_CS3# S_A0 P_CS1# GND GND PDIAG_S P_A2 S_A1 P_A0 S_INTRQ P_A1 BATLOW# GPE1# S_AK# P_INTRQ S_RDY P_AK# S_IOR# P_RDY 5VCC 5VCC Description Ground
Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Page 26 Signal S_IOW# P_IOR# S_DRQ P_IOW# S_D15 P_DRQ S_D0 P_D15 S_D14 P_D0 S_D1 P_D14 S_D13 P_D1 GND GND S_D2 P_D13 S_D12 P_D2 S_D3 P_D12 S_D11 P_D3 S_D4 P_D11 S_D10 P_D4 S_D5 P_D10 5VCC 5VCC S_D9 P_D5 S_D6 P_D9 S_D8 P_D6 GPE2# CBLID_P# RXD# P_D8 RXD S_D7 TXD# P_D7 TXD HDRST# GND GND Description Secondary IDE IO Write Primary IDE IO Read Secondary IDE
6 Module Interfaces This chapter describes connectors with pin outs, LEDs and switches that are used on the module but which interfaces are not part of the ETX standard specification 6.
Solder Side Page 28 PCI Voltage Selection SPI Boot Selection SW3 SW1
6.2 40-pin Multipurpose Connector FPC Connector Type: FCI 59GF Flex 10042867 Pin Orientation: 1 40 Pin Definitions (on ETX module) Pin Interface Signal Remark Pin Interface Signal 40 SPI Program interface VCC_SPI_IN SPI Power Input from flash tool to module.
ETX-BT and the DB40 Module connected 6.3 Status LEDs To facilitate easier maintenance, status LED’s are mounted on the board. LED1 LED2 LED3 LED Descriptions: Name Color Connection Function LED1 Blue BMC output Power Sequence Status Code (BMC) Power Changes, RESET (see Section 7.
6.4 XDP Debug Header Connector Type: Molex 26-pin 52435-2671 1 26 The debug port is a connection into a target-system environment that provides access to JTAG, run control, system control, and observation resources. The XDP target system connector is a Molex 26-pin 52435-2671 connector. Specific plating types, locking clips, and alignment pin details of this connector can be obtained from Molex. No specific plating types, locking clips or alignment pins are required for the XDP tool.
6.5 DP Connector Connector Type: Wurth WE 6871 2214 522 1 22 The DP connector brings out DDI1 port of the Intel® Atom™ SoC as either DP or HDMI/DVI on a flat cable connector.
For HDMI/DVI output, pins 20, 21, 22 should not be used but power should be sourced from 5V (5VS0) rail on the carrier 6.
6.7 GbE Connector Normal support for 100/10 Mbps LAN is through the X4 connector. There is a build option to disconnect these signals and instead route full 1000/100/10 Mbps support to the FPC connector on the module. Note: Standard modules will not include the FPC connector and will only route LAN signals to the X4 connector.
6.8 SW1: SPI Boot Device Selection The ETX-BT supports a form of fail-safe BIOS. In the case that the primary BIOS is corrupted and the BIOS POST takes longer than normal, the system’s POST watchdog will time out and the system will reset with the secondary SPI Flash BIOS assigned as primary. For information on monitoring and operation of the fail-safe BIOS, please refer to SEMA documentation. The SW1 switch allows users to change the boot behavior of the module.
3. The BIOS prompt screen will display a confirmation that BIOS defaults have been reset and request that you reboot the system.
6.10 SW4: PCI Interrupt Routing Select Standard PCI routing is compliant with ETX specification rev 3.02, as below In some cases (e.g. real time OS) PCI routing needs to be modified. This can be done with the SW4 switch. Note that ABCD is the default, standard ETX compliant setting Switch Settings PCI IRQ Postion 1 Postion 2 Comment ABCD ON OFF default DABC ON ON CDAB OFF OFF BCDA OFF ON 6.
7 SEMA (Smart Embedded Management Agent) The onboard microcontroller (BMC) implements power sequencing and Smart Embedded Management Agent (SEMA) functionality. The microcontroller communicates via the System Management Bus with the CPU/chipset. The following functions are implemented. X Total operating hours counter. Counts the number of hours the module has been run in minutes. X On-time minutes counter. Counts the seconds since last system start. X Temperature monitoring of CPU and board temperature.
7.1 Board Specific SEMA Functions 7.1.1 Voltages The BMC of the ETX-BT implements a voltage monitor and samples several onboard voltages. The voltages can be read by calling the SEMA function “Get Voltages”. The function returns a 16bit value divided into high-byte (MSB) and low-byte (LSB). 7.1.2 ADC Channel Voltage Name Voltage Formula [V] 0 CPU-Vcore (MSB<<8 + LSB) x 3.3 / 1024 1 GFX-Vcore (MSB<<8 + LSB) x 3.3 / 1024 2 +V1.05S (MSB<<8 + LSB) x 3.3 / 1024 3 Vmem (MSB<<8 + LSB) x 3.
7.1.3 BMC Status This register shows the status of BMC controlled signals on the ETX-BT.
7.1.4 Exception Codes In case of an error, the BMC drives a blinking code on the blue Status LED (LED1). The same error code is also reported by the BMC Flags register. The Exception Code is not stored in the Flash Storage and is cleared when the power is removed. Therefore, a “Clear Exception Code” command is not needed or supported.
7.1.5 BMC Flags The BMC Flags register returns the last detected Exception Code since power-up and shows the BIOS in use and the power mode. Page 42 Bit Description [0~4] Exception Code [6] 0 = AT mode 1 = ATX mode [7] 0 = Standard BIOS 1 = Fail-safe BIOS.
8 System Resources 8.1 System Memory Map Address Range (decimal) Address Range (hex) Start 128KB below 1MB 000E0000h-000FFFFFh Low BIOS Starts 20MB below 4GB FEC00000h-FEC0040h IO APIC Start 19MB below 4GB FED00000h-FED003FFh HPET Start 64 KB below 4GB FFFF0000h-FFFFFFFFh High BIOS 0K –1MB Size 1MB Description DOS DRAM 8.
8.3 Interrupt Request (IRQ) Lines 8.3.
8.3.
8.
8.5 PCI Interrupt Routing Map INT Line Intel I.G.
8.6 SMBus Address Table Address (hex) Function Device A0 DDR3 channel A DDR3 socket C0 eDP to LVDS NXP3460 49 GbE LAN i211 2E Super I/O W83627DHG-PT (50) BMC μPD78F0763 8.
9 BIOS Setup 9.1 Menu Structure This section presents the six primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections in this section describe the submenus and setting options for each menu item. The default setting options are presented in bold, and the function of each setting is described in the right hand column of the respective table.
9.2 Main The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below the screen shot of this menu for details of the submenus and settings. 9.2.1 System Information Feature Options Description BIOS Version Info only ADLINK BIOS version. Build Date and Time Info only ADLINK date the BIOS was build. 9.2.2 Processor Information Feature Options Description CPU Brand String Info only Display CPU brand name.
9.2.6 System Management 9.2.6.1 System Management > Board Information Board Information Info only SMC Firmware Read only Display SMC firmware. Read only Display SMC firmware build date. Read only Display SMC boot loader. Read only Display SMC boot loader build date. Hardware Version Read only Display SMC hardware Version. PCBA Revision Read only Display PCBA Revision Serial Number Read only Display SMC serial Number. Manufacturing Date Read only Display SMC manufacturing date.
Feature Options Description V1.05 Read only Display actual voltage of the V1.05. VMEM Read only Display actual voltage of the VMEM. V1.00 Read only Display actual voltage of the V1.00. V3.30 Read only Display actual voltage of the V3.30. VIN Read only Display actual voltage of the VIN. AIN 7 Read only Display actual voltage of the AIN7. 9.2.6.
9.2.6.6 System Management > Power Up Feature Options Power Up Info only Power Up watchdog Attention: F12 disables the Power Up Watchdog. Enabled Disabled The Power-Up Watchdog resets the system after a certain amount of time after power-up. Disabled Enable Reduces the power consumption of the system. Turn on Remain off Last State Turn On: The machine starts automatically when the power supply is turned on. Remain Off:To start the machine the power button has to be pressed.
9.2.
9.3 Advanced This menu contains the settings for most of the user interfaces in the system. 9.3.1 CPU Feature Options Description CPU Info only CPU Brand Name Info only Display CPU brand name. CPU Signature Info only Display CPU signature. Processor Family Info only Display processor family. Microcode Patch Info only Display microcode patch. Max CPU speed Info only Display Max CPU speed. Min CPU speed Info only Display Min CPU speed.
Feature Options Description Enabled CPU DTS Disabled Enabled Enabled/Disable Digital Thermal Sensor. Feature Options Description Memory Info only Total Memory Info only Display Total Memory. DIMM#0 Info only Display DIMM#0/1. SPD Write Protect Enabled Disabled Enabled:Writes to SMBus slave addresses A0h – Aeh are disabled. Max TOLUD 2.5 GB Maximum Value of TOLUD. 9.3.2 9.3.
Feature Options Description IGFX Boot Display Device CRT Select the video device which will be activated during POST.This has no effect if external graphic present.
9.3.5 USB Feature Options Description USB Info only USB Module Version Info only USB Devices Info only X drive, x keyboards, x mouse, x hubs Legacy USB Support Enabled Disabled Auto Enables legacy USB support. Auto option disables legacy support if no USB devices are connected. Disable option will keep USB devices available only for EFI applications and setup. XHCI Hand-off Enabled Disabled This is a workaround for OSes without XHCI hand-off support.
Feature Options Description USB Pre Port Control Enabled Disabled Control each of the USB ports (0~3). Enable: Enable USB per port; Disable: Use USB port x settings. USB Port #0~3 Enabled Disabled Enable / Disable USB Port 0-3. 9.3.6 Network Feature Options Network Info only Network Stack Enabled Disabled Enable/Disable UEFI network stack. LAN Controller Enabled Disabled Enable/Disable UEFI network stack.
9.3.8 Super IO Feature Options Super IO Chip Info only W83627DHG Super IO Configuration Info only Serial Port 1 Configuration Serial Port Enabled Disabled Enable/Disable serial port (COM). Device Settings IO=3F8h; IRQ=4 Fixed configuration of serial port. Change Settings Auto IO=3F8h; IRQ=4 IO=3F8h; IRQ=3,4,5,6,7,10,11,12 IO=2F8h; IRQ=3,4,5,6,7,10,11,12 IO=3E8h; IRQ=3,4,5,6,7,10,11,12 IO=2E8h; IRQ=3,4,5,6,7,10,11,12 Select an optimal setting for Super IO device.
9.3.9 ACPI and Power Management Feature Options ACPI and Power Management Info only Enable ACPI Auto Configuration Enabled Disabled Enables or disables BIOS ACPI auto configuration. Enable Hibernation Enabled Disabled Enables or disables system ability to hibernate (OS/S4 Sleep State). This option may be not effective with some OS. ACPI Sleep State Suspend Disabled S3 (Suspend to RAM) Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed.
9.3.11.1 Serial Port Console > Console Redirection Settings Feature Options COM0/COM1 Console Redirection Settings Info only Terminal Type VT100 VT100+ VT-UTF8 ANSI Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes. Bits per second 9600 19200 38400 57600 115200 Selects serial port transmission speed. The speed must be matched on the other side.
9.3.12 ACPI Thermal Feature Options Thermal Info only CPU Temperature Info only Critical Trip Point Disabled 85 C 95 C This value controls the temperature of the ACPI Critical Trip Point - the point in which the OS will shut the system off. Active Cooling Trip Point Disabled 40 C 50 C 60 C 70 C BMC Default Active cooling trip point.
9.3.13.1 Miscellaneous > BIOS Security Configuration Feature Options BIOS Security Configuration Info only Global SMI Lock Enabled Disabled Description Enable or disable SMI lock. 9.3.13.2 Miscellaneous > Trusted Computing Feature Options Coniguration Info only Security Device Support Enabled Disabled Current Status Information Info only Page 64 Description Enables or disables BIOS support for security device. O.S. will not show security device.
9.4 Security 9.4.1 Password Description Feature Options Administrator Password Enter password User Password Enter password Secure Boot menu Submenu Customizable secure boot settings. Feature Options Description System Mode Setup Secure Boot Info only Secure Boot Disabled Enabled Secure Boot can be enabled if 1.System running in User mode with enrolled Platform Key (PK) 2.CSM function is disabled. Secure Boot Mode Standard Custom Secure Boot mode selector.
9.5 Boot 9.5.1 Boot Configuration Feature Options Boot Configuration Info only Setup Prompt Timeout 1 Number of seconds to wait for setup activation key.65535 (0xFFFF ) means indefinite waiting. Bootup NumLock State On Off Select the keyboard Numlock state. Quiet Boot Disabled Enabled Enable or disables Quiet Boot option.
Feature Options Description Boot option filter UEFI and Legacy Legacy only UEFI only This option controls Legacy/UEFI ROMs priority. Option ROM execution order Info only Network Do not launch UEFI only Legacy only Controls the execution of UEFI and Legacy PXE OpROM. Storage Do not launch UEFI only Legacy only Controls the execution of UEFI and Legacy Storage OpROM. Video Do not launch UEFI only Legacy only Controls the execution of UEFI and Legacy Video OpROM.
Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use. • Please read these safety instructions carefully. • Please keep this User‘s Manual for later reference. • Read the specifications section of this manual for detailed information on the operating environment of this equipment.
Getting Service ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan Tel: +886-2-8226-5877 Fax: +886-2-8226-5717 Email: service@adlinktech.com Ampro ADLINK Technology, Inc. Address: Tel: Toll Free: Fax: Email: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA +1-408-360-0200 +1-800-966-5200 (USA only) +1-408-360-0222 info@adlinktech.com ADLINK Technology (China) Co., Ltd. Address: 300 Fang Chun Rd.
ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33 (0) 1 60 12 35 66 Fax: +33 (0) 1 60 12 35 66 Email: france@adlinktech.com ADLINK Technology Japan Corporation Address: KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku Tokyo 101-0045, Japan Tel: +81-3-4455-3722 Fax: +81-3-5209-6013 Email: japan@adlinktech.com ADLINK Technology, Inc.
