ETX®-PVR Computer-on-Module Reference Manual P/N 50-1Z057-1010
Notice Page DISCLAIMER ADLINK Technology, Incorporated makes no representations or warranties with respect to the contents of this manual or of the associated ADLINK products, and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. ADLINK shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product, even if it has been notified of the possibility of such damages.
Contents Chapter 1 About This Manual ....................................................................................................1 Purpose of this Manual ....................................................................................................................1 References ......................................................................................................................................1 Chapter 2 Product Overview...........................................................
Contents Miscellaneous ............................................................................................................................... 42 Oops! Jumper (BIOS Recovery) ............................................................................................. 42 Remote Access ...................................................................................................................... 42 Remote Access Setup ...........................................................................
Contents List of Tables Table 2-1. Table 2-2. Table 2-3. Table 2-4. Table 2-5. Table 2-6. Table 2-7. Table 3-1. Table 3-2. Table 3-3. Table 3-4. Table 3-5. Table 3-6. Table 3-7. Table 3-8. Table 4-1. Table A-1. ETX-PVR Major Components Descriptions and Functions ......................................................8 Connector and Socket Descriptions.......................................................................10 Jumper Header Setting .............................................................
Contents vi Reference Manual ETX-PVR
Chapter 1 About This Manual Purpose of this Manual This manual is for designers of systems based on the ETX®-PVR Computer-on-Module (COM). This manual contains information that permits designers to create an embedded system based on specific design requirements.
Chapter 1 • About This Manual Realtek and the ALC262-VD2-GR chip, used for the Audio CODEC Web site: http://www.realtek.com/search/default.aspx?keyword=alc262 • ITE Tech. Inc. and the IT8888G-L chip, used for the PCI-to-ISA bridge conversion Web site: http://www.ite.com.tw/EN/products_more.aspx?CategoryID=3&ID=5,76 • Greenliant and the GLS85LP1004P Solid State Drive (SSD) Web site: http://www.greenliant.
Chapter 2 Product Overview This introduction presents general information about the ETX Architecture and the ETX-PVR Computeron-Module (COM). After reading this chapter you should understand: • ETX Computer-on-Module concept • ETX-PVR product description • ETX-PVR features • Major components • Connectors • Specifications ETX Computer-on-Module Concept Embedded system designers face increasing pressures to bring products to market quickly.
Chapter 2 Product Overview CPU and Software Design Path Hardware Design Path Design applicationspecific baseboard Select CPU Fabricate baseboard Select OS & Tools Write and Test Application Code Revise baseboard if necessary Write drivers for custom Logic Integrate application code ETXdesignflw Debug baseboard Figure 2-2.
Chapter 2 Product Overview Board Features • • • • • • • • CPU Provides Intel Atom 1.66GHz N455 (6.5W) or Atom 1.80GHz D525 (13W) processor cores DMI (Direct Media Interface) with 1 GB/s of bandwidth in each direction Enhanced SpeedStep® technology On die 512-kB, 8-way L2 cache Memory Single standard 204-pin DDR3 SODIMM socket Supports +1.5V DDR3, 800MHz RAM up to 2GB Supports only non-ECC memory Supports only unbuffered memory PCI Bus/ISA Bus PCI 2.
Chapter 2 • • • • • • 6 Product Overview USB Ports Provide two root USB hubs Provide up to four USB ports Support USB boot devices Support USB v2.0 EHCI and OHCI v1.
Chapter 2 Product Overview Block Diagram CPU Intel Atom 1.66GHz N455 (6.5W) or 1.80GHz D525 (13W) (with Integrated Video and Memory) VGA Video LVDS Video Temperature Sensor X2 Connector (J2) X3 Connector (J3) Figure 2-3 illustrates the functional components of the board.
Chapter 2 Product Overview Major Components (ICs) Table 2-1 lists the major ICs, including a brief description of each, on the ETX-PVR. Figures 2-4 and 2-5 show the locations of the ICs. Table 2-1. Major Components Descriptions and Functions 8 Chip Type CPU (U1) Mfg. Intel Model Atom N455 or D525 Description 1.66GHz, 6.5W (N455) or 1.
Chapter 2 Product Overview Table 2-1. Major Components Descriptions and Functions (Continued) Temperature Sensor (U20 - on bottom side) [see Figure 2-4 on page 9] ON Semi ADT7481ARMZ Digital thermometer and under/over alarm for local, CPU, and I/O Hub temperatures Measures its own ambient temperature and the temperature outputs of the CPU and I/O Hub. Provides under/over temperature alarm.
Chapter 2 Product Overview Key: U9 - Super I/O U11 - HD Audio U12 - Ethernet U14 - SSD U19 - Board Controller U37 - SPI Flash U12 U9 U19 U37 U11 ETX-PVR_Bottom_Comp_a U14 Figure 2-5. Component Locations (Bottom Side) Connector and Socket Definitions Table 2-2 describes the connectors and sockets shown in Figures 2-6 and 2-7. Table 2-2. Connector and Socket Descriptions 10 Jack # Name Description J1 ETX X1 (on bottom side of the board; see Figure 2-7.) Standard 100-pin, 0.
Chapter 2 Product Overview Table 2-2. Connector and Socket Descriptions (Continued) J4 ETX X4 (on back of the board; see Figure 2-7.) Standard 100-pin, 0.6 mm Hirose connector for IDE, Ethernet, SMBus, I2C, speaker, VBat, and power management signals J6 SODIMM Standard un-buffered 204-pin socket for DDR3 memory J7 LPC Not Supported J8 SATA1 Standard 7-pin, 1.27mm right-angle connector for serial ATA signals J9 SATA2 Standard 7-pin, 1.
Chapter 2 Product Overview J4 J2 J3 ETX-PVR_Bottom_Conn_a Key: J1 - X1 ETX connector J2 - X2 ETX connector J3 - X3 ETX connector J4 - X4 ETX connector J1 Figure 2-7. Connector Locations (Bottom Side) Jumper Header Definition Table 2-3 describes the jumper header shown in Figure 2-6 on page 11. Table 2-3. Jumper Header Setting Jumper # Installed Removed/Installed JP1 – SSD Select (Master/Slave) Master (Default) Slave (Removed) NOTE 12 Jumpers or shunts use 2mm pitch.
Chapter 2 Product Overview Specifications Physical Specifications Table 2-4 provides the physical dimensions of the board. Table 2-4. Weight and Footprint Dimensions Item Dimension 0.10 kg (0.20 lb) Weight Height (overall) 6.35mm (0.25") Width 95.25mm (3.75") Length 114.3mm (4.5") Thickness 2.36mm (0.093") NOTE Overall height is measured from the upper board surface to the highest permanent component on the upper board surface. This measurement does not include the cooling solution. 0.20 0.
Chapter 2 Product Overview Environmental Specifications Table 2-5 provides the most efficient operating and storage environmental ranges required for this board. Table 2-5. Environmental Requirements Parameter 1.66GHz Atom N455, Humidity Temperature 1.
Chapter 2 Product Overview Figure 2-9. N455 (with SpeedStep disabled) Peak In-Rush Current and Duration Figure 2-10.
Chapter 2 Product Overview Figure 2-11.
Chapter 2 Product Overview Thermal/Cooling Requirements The CPU, I/O Hub, and voltage regulators are the main sources of heat on the board.The ETX-PVR is designed to operate at the maximum speeds of the N455 (1.66GHz) or N525 (1.80GHz) CPUs and requires a cooling solution. ADLINK offers two cooling solutions, as well as a heat spreader platform on which to build a cooling solution (see Table 2-7 for descriptions of the cooling solution options.
Chapter 2 18 Product Overview Reference Manual ETX-PVR
Chapter 3 Hardware Overview This chapter discusses the hardware features of the ETX-PVR in the following order: • CPU • Graphics • Memory • Interrupt Channel Assignments • Memory Map • I/O Address Map • PCI Bus Interface (J1) USB Audio Interface • ISA Bus Interface (J2 [ISA DMA not supported]) • Primary I/O Interface (J3) • • Floppy/Parallel Interface Serial Port Interfaces Keyboard Mouse Video Interfaces (VGA and LVDS) IDE and Auxiliary Interface (J4) Pr
Chapter 3 Hardware CPU The ETX-PVR offers two versions of the Intel Atom™ N400/D500 series CPU—the N455 and D525—operating at 1.66GHz with 6.5W TDP and 1.80GHz with 13W TDP, respectively. The N400/D500 integrates a low-power and high-performance x86 Processor Core with Memory Controller and 3D Graphics Engine. This single chip is based on 45-nm, Hi-K process technology, ideal for deeply embedded applications.
Chapter 3 Hardware Interrupt Channel Assignments (IRQs) The interrupt channel assignments are listed in Table 3-1. Table 3-1. Interrupt Channel (IRQs) Assignments (Typical) Device vs IRQ No.
Chapter 3 Hardware Memory Map Table 3-2 provides the common PC/AT memory allocations. These are DOS-level addresses. The OS typically hides these physical addresses by way of memory management. Table 3-2.
Chapter 3 Hardware Table 3-3. I/O Address Map (Continued) 0A79h ISA PnP Ports 0B00-0B7F SIO Runtime Registers 0CF8-0CFF PCI bus Configuration Address and Data NOTE 0A79h is the ISA PnP port used by the BIOS and an OS that supports this feature to recognize ISA PnP (Plug and Play) cards. The Intel I/O hub ICH-8 (ICH-6 or later) does not support ISA DMA. X1 PCI Bus Interface (J1) The J1, 100-pin standard connector is used for the PCI bus, USB ports, and HD Audio interface connections.
Chapter 3 Hardware Audio Interface The Realtek HD Audio CODEC (ALC262) on the ETX-PVR supports the HDA Link protocol and the supported features in the following list. • Supports audio amplifier on baseboard • PC-Beep pass through to Line Out while reset is held Active Low • True Line Level Output with volume control independent of Line Out • Digital 3V and 5V compliant Table 3-4 provides a complete list of the ETX J1 connector signals. Table 3-4.
Chapter 3 Hardware Table 3-4. Complete X1 Interface Pin Signal Descriptions (J1) (Continued) 24 +3.3V +3.3 volts +/- 5% (Caution: This signal is generated by the ETX-PVR.) [Note: This signal is not supported on ETX-PVR-R-14, R-16, and R-18 models.] 25 AD1 Address/Data bus 1 – Refer to J1, pin-23 for more information. 26 AD2 Address/Data bus 2 – Refer to J1, pin-23 for more information. 27 AD4 Address/Data bus 4 – Refer to J1, pin-23 for more information.
Chapter 3 Hardware Table 3-4. Complete X1 Interface Pin Signal Descriptions (J1) (Continued) 26 55 PERR* Parity Error – This signal is driven by the PCI target during a write to indicate a data parity error has been detected. 56 NC Not connected (Reserved) 57 PME* Power Management Event – This signal is an optional signal that can be used by a device to request a change in the device or system power state.
Chapter 3 Hardware Table 3-4. Complete X1 Interface Pin Signal Descriptions (J1) (Continued) 91 AD30 Address/Data bus 30 – Refer to J1, pin-23 for more information. 92 USB1+ Universal Serial Bus Port 1 Data Positive Polarity 93 PCIRST* PCI Bus Reset – Signal resets entire PCI Bus. Asserted during a system reset. 94 AD31 Address/Data bus 31 – Refer to J1, pin-23 for more information.
Chapter 3 Hardware Table 3-5. Complete X2 ISA Bus Interface Pin Signal Descriptions (J2) (Continued) 28 19 MEMR* Memory Read – This signal instructs a selected memory device to drive data onto the data bus. It is active on all memory read cycles. 20 NS Not Supported 21 LA17 Latchable Address 17 – These signals (0-23) must be latched by the resource if the line is required for the entire data cycle.
Chapter 3 Hardware Table 3-5. Complete X2 ISA Bus Interface Pin Signal Descriptions (J2) (Continued) 49 SA5 System Address 5 – Refer to SA0, pin-39 for more information. 50 IRQ4 Interrupt Request 4 – Asserted by a device when it has pending interrupt request. Only one device may use the request line at a time. 51, 52 VCC DC Power – +5 volts +/- 5% 53 SA6 System Address 6 – Refer to SA0, pin-39 for more information.
Chapter 3 Hardware Table 3-5. Complete X2 ISA Bus Interface Pin Signal Descriptions (J2) (Continued) 81 IOCHRDY I/O Channel Ready – This signal allows slower ISA boards to lengthen I/O or memory cycles by inserting wait states. This signal’s normal state is active high (ready). ISA boards drive the signal inactive low (not ready) to insert wait states.
Chapter 3 Hardware X3 Primary I/O Interface (J3) The J3, 100-pin connector is used for Floppy or Printer (LPT1) interface, Serial interfaces (COM1 and COM2), Mouse and Keyboard interfaces, and the video interfaces for standard VGA and LVDS video. This section briefly describes each of these features. Refer to Table 3-6 on page 32 for pin definitions of the X3 interface.
Chapter 3 Hardware LVDS Interface The CPU provides direct LVDS outputs, which support a single channel 18-bit LVDS interface with three signal lines. The N455 CPU provides digital LVDS resolution up to 1280x800, and the D525 CPU provides resolutions up to 1366x768. NOTE The necessary voltages to drive a flat panel are not supplied through the J3 connector on the ETX-PVR module.
Chapter 3 Hardware Table 3-6.
Chapter 3 Hardware Table 3-6. Complete X3 Interface Pin Signal Descriptions (J3) (Continued) 60 ERR* Parallel Error – This is a status output signal from the printer. A low state indicates an error condition on the printer. HDSEL* Floppy Head Select – Selects floppy diskette side for Read/Write operations (0 = side 1, 1 = side 0). 61 NS Not Supported 62 PD6 Parallel Port Data 6 – Refer to pin-58 and 80 for more information. MTR0* Floppy Motor Control 0 – Select motor on drive 0.
Chapter 3 Hardware Table 3-6. Complete X3 Interface Pin Signal Descriptions (J3) (Continued) 80 PD0 Parallel Port Data 0 – This pin (0 to 7) provides a parallel port data signal and is the printer data LSB. INDEX* Floppy Index – Sense to detect that the head is positioned over the beginning of a track. 81, 82 VCC +5 volts +/- 5% 83 RXD1 Receive Data 1 – Serial port 1 receive data in. 84 ACK* Parallel Acknowledge – This is a status input signal from the printer.
Chapter 3 Hardware X4 IDE and Auxiliary Interface (J4) The J4, 100-pin connector is used for the IDE port, Ethernet port, RTC/Battery, speaker, power management, SMBus, I2C bus, and miscellaneous power interface signals. This section describes each of these features. Refer to Table 3-8 on page 38 for pin definitions of the X4 interface.
Chapter 3 Hardware Power Control Signals The ETX-PVR supports various power control signals provided through the baseboard to control the ETX-PVR and the power supply. • The Power Good input signal (PWGIN) is provided from an external input typically from the external power supply (ATX) to the baseboard. This signal is typically an active-high input to the ETX baseboard and indicates to the ETX module it can begin the boot process.
Chapter 3 Hardware SMBus The I/O Hub contains an integrated SMBus controller with both a host and slave SMBus port; but the host cannot access the slave internally. The slave port allows an external master access to the I/O Hub through the J4 connector. The master contained in the I/O Hub is used to communicate with the SODIMM SPD (Serial Presence Detect), Temperature Sensor, and the clock generator.
Chapter 3 Hardware Table 3-8. Complete X4 Interface Pin Signal Descriptions (J4) (Continued) 17, 18 VCC DC Power – +5 volts +/-5% 19 OVCR* Over Current Detect – This signal indicates a USB over-current condition. 20 NC Not Connected 21 EXTSMI* External System Management Interrupt – This signal is provided by external circuitry to initiate an SMI event with the ETX-PVR. 22 I2DAT This data line implements an I2C bus, which supports external slave devices only.
Chapter 3 Hardware Table 3-8. Complete X4 Interface Pin Signal Descriptions (J4) (Continued) 40 44 PIDE_INTRQ Primary Drive Interrupt Request (IRQ 14) – Asserted by drive when it has pending interrupt (PIO transfer of data to or from the drive to the host). 45 NC Not Connected 46 PIDE_AK* Primary DMA Channel Acknowledge – Used by the host to acknowledge data has been accepted or data is available. Used in response to PIDE_DMARQ when asserted.
Chapter 3 Hardware Table 3-8. Complete X4 Interface Pin Signal Descriptions (J4) (Continued) 75 NC Not Connected 76 PIDE_D11 Primary Disk Data 11 – Refer to J4, pin-58 for more information. 77 NC Not Connected 78 PIDE_D4 Primary Disk Data 4 – Refer to J4, pin-58 for more information. 79 NC Not Connected 80 PIDE_D10 Primary Disk Data 10 – Refer to J4, pin-58 for more information.
Chapter 3 Hardware Miscellaneous Oops! Jumper (BIOS Recovery) The Oops! jumper is provided in the event the BIOS settings you have selected prevent you from booting the system. By using the Oops! jumper you can prevent the current BIOS settings in the Flash memory from being loaded, forcing the use of the default settings. Connect the DTR pin to the RI pin on serial port 1 (COM 1) on the baseboard prior to boot up to prevent the present BIOS settings from loading.
Chapter 3 Hardware Watchdog Timer (WDT) The Watchdog Timer (WDT) restarts the system if an error or mishap occurs, allowing the system to recover from the mishap, even though the error condition may still exist. Possible problems include failure to boot properly, loss of control by the application software, failure of an interface device, unexpected conditions on the bus, or other hardware or software malfunctions.
Chapter 3 Hardware Sleep States (ACPI) The ETX-PVR supports the ACPI (Advanced Configuration and Power Interface) standard, which is a key component of certain Operating Systems’ (OSs’) power management. The supported features (sleep states) listed here are only available when an ACPI-compliant OS is used for the ETX-PVR. The term “sleep” state refers to a low wake latency (reduced power consumption) state, which can be re-started (awakened) restoring full operation to the ETX-PVR.
Chapter 3 • Hardware 4th state is a hibernate or suspend-to-disk state (S4). This condition stores the state of your system (open files and programs) on the hard disk drive before powering down. In this state there are no internal operations taking place, except for the internal RTC. This includes no activity for the RAM, CPU, and external peripherals, such as hard disk drives or CDROMs. The ETX-PVR appears to be off, including the Power-On LED and the S3 Mode LED.
Chapter 3 46 Hardware Reference Manual ETX-PVR
Chapter 4 BIOS Setup Introduction This chapter assumes the user is familiar with BIOS Setup and does not attempt to describe the BIOS Setup functions. Refer to “BIOS Setup Menus ” on page 49 for a map of the BIOS Setup features. If ADLINK has added to or modified the standard functions, these functions will be described. Entering BIOS Setup (Local Video Display) To enter BIOS Setup using a local video display for the ETX-PVR: 1. Turn on the display and the power supply to the ETX-PVR. 2.
Chapter 4 9. BIOS Setup Press the F4 key to enter Setup early in the boot sequence if Quick Boot is set to [Enabled]. If Quick Boot is set to [Enabled], you may never see the screen prompt. 10. Use the key to select the screen menus listed in the Opening BIOS screen. NOTE The serial console port is not hardware protected Diagnostic software that probes hardware addresses may cause a loss or failure of the serial console functions.
Chapter 4 BIOS Setup BIOS Setup Menus This section provides illustrations of the six main setup screens in the ETX-PVR BIOS Setup Utility. Below each illustration is a bullet list of the screen’s menus and setting selections. The setting selections are presented in brackets after each menu or menu item and the default settings are presented in bold. For more detailed definitions of the BIOS settings, refer to the AMIBIOS8 manual: http://www.ami.com/support/doc/MAN-EZP-80.pdf. Table 4-1.
Chapter 4 BIOS Setup BIOS Advanced Setup Screen BIOS Setup Utility Main Advanced Power Boot Security Exit Advanced Settings Configure CPU CPU Configuration Chipset Configuration Video Function Configuration IDE Configuration Super IO Configuration USB Configuration PCI PnP Configuration Remote Access Configuration Watchdog Timer Configuration Enter F1 F10 ESC Select Screen Select Item Go to Sub Screen General Help Save and Exit Exit ETX-PVR_BIOS_Advanced_a VXX.
Chapter 4 BIOS Setup South Bridge Chipset Configuration • Onboard LAN Controller [Enabled; Disabled] - LAN Boot ROM [Enabled; Disabled] - LAN Wake Up From S5 [Enabled; Disabled] • • HDA Controller [Enabled; Disabled] • SMBus Controller [Enabled; Disabled] Video Function Configuration Initiate Graphic Adapter [PCI/IGD; IGD] Internal Graphics Mode Select [Enabled, 8MB] DVMT Mode Select [Fixed Mode; DVMT Mode] • • DVMT/Fixed Memory [128MB; 256MB; Maximum DVMT] Boot Display Device [C
Chapter 4 • BIOS Setup • AHCI Port0 [Not Detected] • AHCI Port2 [Not Detected] Super IO Configuration Serial Port1 Address [Disabled; 3F8; 3E8; 2E8] • • • 52 Serial Port1 IRQ [3; 4; 10; 11] Serial Port2 Address [Disabled; 2F8; 3E8; 2E8] • Serial Port2 IRQ [3; 4; 10; 11] • Serial Port2 Mode [Normal; IrDA; ASK IR] Parallel Floppy Controller [FDC; 378; 278; 3BC] • Parallel Port Mode [Normal; SSP (Bi-Dir); EPP+SSP; ECP; ECP+EPP] • Parallel Port IRQ [IRQ5; IRQ7] Floppy B [Disabled
Chapter 4 • BIOS Setup Reserved Memory Size [Disabled; 16k; 32k; 64k] Remote Access Configuration Remote Access [Hot Cable; Enabled] Serial Port Number [COM1; COM2] • Base Address, IRQ [3F8h, 4] Serial Port mode [115200 8, n, 1; 57600 8, n, 1; 38400 8, n, 1; 19200 8, n, 1; 09600 8, n, 1] Flow Control [None; Hardware; Software] Redirection After BIOS POST [Disabled; Boot Loader; Always] Terminal Type [ANSI; VT100; VT-UTF8] VT-UTF8 Combo Key Support [Disabled; Enabled] Sr
Chapter 4 BIOS Setup • APIC ACPI SCI IRQ [Disabled; Enabled] • USB Device Wakeup From S3/S4 [Disabled; Enabled] • High Performance Event Timer [Disabled; Enabled] • HPET Memory Address [FED00000h; FED01000h; FED02000h; FED03000h] • ACPI OS shutdown mode [ATX; AT] • Restore on AC Power Loss [Power Off; Power On; Last State] Hardware Health Configuration • CPU Temperature XX°C / XXX°F BIOS Boot Setup Screen BIOS Setup Utility Main Advanced Power Boot Security Exit Boot Settings Confi
Chapter 4 BIOS Setup 1st Boot Device [Removable Dev; CD/DVD; SM-XGB NANDrive; USB XXXX Drive XXXX; Network; Disabled] 2nd Boot Device [Removable Dev; CD/DVD; SM-XGB NANDrive; USB XXXX Drive XXXX; Network; Disabled] 3rd Boot Device [Removable Dev; CD/DVD; SM-XGB NANDrive; USB XXXX Drive XXXX; Network; Disabled] 4th Boot Device [Removable Dev; CD/DVD; SM-XGB NANDrive; USB XXXX Drive XXXX; Network; Disabled] 5th Boot Device [Removable Dev; CD/DVD; SM-XGB NANDrive; USB XXXX Drive XXXX; Netw
Chapter 4 BIOS Setup BIOS Security Setup Screen Main Advanced Power BIOS Setup Utility Boot Security Exit Security Settings Install or change the password Supervisor Password: Not installed User Password: Not installed Change Supervisor Password Change User Password Enter F1 F10 ESC Select Screen Select Item Change General Help Save and Exit Exit ETX-PVR_BIOS_Security_a VXX.XX (C) Copyright 1985-20XX, American Megatrends, Inc. Figure 4-5.
Chapter 4 BIOS Setup BIOS Exit Setup Screen Main Advanced Power BIOS Setup Utility Boot Security Exit Exit Options Exit System Setup after saving the changes. Save Changes and Exit Discard Changes and Exit Discard Changes F10 key can be used for this operation Load Optimal Defaults Load Failsafe Defaults Select Screen Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit VXX.XX (C) Copyright 1985-20XX, American Megatrends, Inc. ETX-PVR_BIOS_Exit_a Figure 4-6.
Chapter 4 58 BIOS Setup Reference Manual ETX-PVR
Appendix A Technical Support ADLINK Technology, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Ask an Expert are given the highest priority, and usually will be addressed within one working day. • ADLINK Ask an Expert – This is a comprehensive support center designed to meet all your technical needs. This service is free and available 24 hours a day through the Ampro By ADLINK web page at http://www.adlinktech.com/AAE/.
Appendix A Technical Support Table A-1. Technical Support Contact Information (Continued) ADLINK Technology Beijing Address: ࣫ҀᏖ⍋⎔ऎϞഄϰ䏃 1 োⲜ߯ࡼॺ E ᑻ 801 ᅸ(100085) Rm. 801, Power Creative E, No. 1, B/D Shang Di East Rd., Beijing, 100085 China Tel: +86-10-5885-8666 Fax: +86-10-5885-8625 Email: market@adlinktech.com ADLINK Technology Shenzhen Address: ⏅ഇᏖफቅऎ⾥ᡔುफऎ催ᮄफϗ䘧 ᭄ᄫᡔᴃು A1 ᷟ 2 ὐ C ऎ (518057) 2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7, High-Tech Industrial Park S.
Index Numerics 1 to 255 sec interval, Watchdog Timer ............... 43 A ACPI (Advanced Configuration and Power Interface) .................................................................... 44 Advanced BIOS setup screen ............................. 50 AMI BIOS User’s Guide ...................................... 1 ANSI-compatible serial terminal ........................ 42 Atom N400/D500 series CPU ........................ 4, 20 audio chip specification ............................................
Index P heat sinks ....................................................... 17 I/O address map ............................................ 22 IDE port .................................................... 5, 36 IRQ assignments ........................................... 21 ISA bus ......................................................... 27 jumper setting on board ................................ 12 memory ........................................................... 5 memory map ............................
