Instruction Manual

Chapter 3 Hardware
36 Reference Manual ETX-PVR
X4 IDE and Auxiliary Interface (J4)
The J4, 100-pin connector is used for the IDE port, Ethernet port, RTC/Battery, speaker, power management,
SMBus, I2C bus, and miscellaneous power interface signals. This section describes each of these features.
Refer to Table 3-8 on page 38 for pin definitions of the X4 interface.
IDE Port
Supports one EIDE channel for the on-board Solid State Drive (SSD) and up to two devices
Supports EIDE Ultra DMA 33/66/100 in Master Mode
Supports PIO IDE transfers up to 14 Mbytes/sec
Supports IDE Bus Master transfers up to 100 Mbytes/sec
Ethernet Port Interface
The ICH8-M integrates one Gigabit Ethernet (GbE) controller. The integrated GbE controller delivers
signals to the Intel 82567V Gigabit Ethernet transceiver, which offers physical layer (PHY) signals to the
ETX X4 interface. The ETX specification supports only a 10/100 fast Ethernet solution and therefore
utilizes only the first MDI pair (MDI1 and MDI2). Refer to the following bullets for a list of the Ethernet
port features.
Supports low power 3.3V device
Provides chained memory structure
Supports full duplex or half-duplex operation
Supports full duplex operation at 10 Mbps and 100 Mbps
Supports half-duplex mode with enhanced performance by a proprietary collision reduction mechanism
Provides IEEE 802.3 10BaseT/100BaseTX compatible physical layer
Supports data transmission with minimum interframe spacing (IFS)
Supports IEEE 802.3u Auto-Negotiation
Provides 3 KB transmit and 3 KB receive FIFOs (helps prevent data underflow and overflow)
Provides IEEE 802.3x 100BaseTX flow control
Improved dynamic transmit chaining with multiple priorities transmit queues
Supports an Ethernet port RJ-45 connector and the magnetics on the baseboard only