Express-BASE6 User’s Manual Manual Revision: 2.
Revision History Page 2 Release Date Change 2.00 2.01 2012/6/25 2013/09/11 Initial release Update to B1 PCB version (COM.0 Rev.2.
Table of Contents Preface ............................................................................................................................ 5 1 Introduction ............................................................................................................... 7 2 Special Features ....................................................................................................... 8 2.1 2.2 2.3 2.4 2.5 2.6 Primary LPC based Super I/O.....................................................
6.17 6.18 6.19 6.20 Power Connectors .............................................................................................................. 29 Power Jumper Settings ....................................................................................................... 30 Other Connectors ................................................................................................................ 31 Other Jumper Settings ............................................................................
Preface Copyright 2012-2013 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.
Conventions Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly. Additional information, aids, and tips that help users perform tasks. Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task. Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.
1 Introduction The COM Express approach of custom carrier combined with off the shelf system cores is an excellent solution when you need to customize but lack the time or quantity for a complete redesign. It fits most system integration projects with production volumes from 500 to 10,000 pcs per year.
2 Special Features 2.1 Primary LPC based Super I/O COM Express modules do not have a Super I/O chip onboard as this is considered legacy. Consequently, a Super I/O is placed on the carrier board as an optional item. The ExpressBASE6 uses a Winbond W83627DHG-PT supporting COM and PS/2 Keyboard and Mouse. The Winbond W83627DHG-PT supports a -40°C to 85°C temperature range and is pin compatible with the W83627DHG-P. 2.2 Secondary BIOS The Express-BASE6 supports the Serial Peripheral Interface (SPI) for COM.
3 Component Location JP20 JP22 JP21 CN34 CN34 CN33 BT1 JP19 JP4 PCIE6 JP29 JP30 JP31 LED5 88 Express-BASE6 S/N 51-77104-0B10 CN32 CN36 CN35 JP14 LED4 LED11 LED9 LED7 LED23 LED20 LED3 LED1 PCIE7 LED19 LED18 LED17 LED16 LED15 LED14 LED13 LED12 PCIE5 LED10 LED8 LED6 CN41 CN42 JP32 PCIE4 CN31 JP28 ON DIP CN39 SW4 JP26 JP25 1 2 3 S1 4 PCIEA1 CN37 SW3 CN40 DDI1 JP18 JP7 JP6 JP5 U55 PEG1 SATA0 SATA1 CN18 CN10 SATA2 SATA3 JP9 CN3 JP8 JP37 CN15 FAN3 CN4 CN31 CN45 CN30 C
4 Function Block Diagram Header DB25 Header 2x17 Header DB9 RJ45 Analog VGA USB0 USB1 Dual Channel LVDS LAN USB 2.0/3.0 USB3 USB 2.0/3.0 USB4 USB5 SATA SATA0 SATA SATA1 SATA SATA2 SATA SATA3 USB6 USB7 PCIe lane 0 to 3 PCIe lane 4 Audio 7.1 Channel S/PDIF out Super I/O LPC Winbond W83627DHG-PT LPC Header PCIe lane 5 4x USB 2.0 PCIe x4 PCIe x1 PCIe x1 PCIe x1 Express Card PCIe lane 7 CD COM1 COM2 HDA AB PS/2 KB/MS Audio Codec ALC886 USB 2.0/3.
5 Mechanical Dimensions Express-BASE6 User’s Manual Page 11
6 Connectors and Pin-outs 6.1 Carrier Board Signals - Type 6 AB Connector CD Connector 1 Gigabit Ethernet port USB 3.0 support, extended signaling on four of eight USB 2.0 ports LPC interface 4 Serial ATA channels 2 PCI Express x1 lanes High Definition Audio 1 PCI Express x16 8 USB 2.
6.4 COM Express Board-to-Board Connectors Signals and Pinout for: COM Express Type 6. Row A Pin No.
COM Express Board-to-Board Connectors (cont'd): Row A A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 G ND(F IX E D) P C IE _ TX 5+ P C IE _ TX 5G PI0 P C IE _ TX 4+ P C IE _ TX 4G ND P C IE _ TX 3+ P C IE _ TX 3G ND(F IX E D) P C IE _ TX 2+ P C IE _ TX 2G PI1 P C IE _ TX 1+ P C IE _ TX 1G ND G PI2 P C IE _
6.5 PCI Express Slots PCI Express x1: PCIE4 PCIE5 PCIE7 (from corresponding PCIEn signals on AB connector) B1 A1 B11 B12 A11 A12 B18 A18 PCIE6: ExpressCard - PCIe only (from PCIE6 signal on AB connector) 26 Express-BASE6 User’s Manual 1 Pin Signal Pin Signal B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 + 12V + 12V NC GND SMB_CK SMB_DAT GND + 3.3V TRST# +3.
PCIE x4 (from PCIE0~3 signals on AB connector) Page 16 Pin Signal Pin Signal B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 + 12V + 12V NC GND SMB_CK SMB_DAT GND + 3.3V TRST# +3.
B82 B12 B11 B1 A82 A12 A11 A1 PEG1: PCI Express x16 Pin Signal Pin Signal Pin Signal Pin Signal B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 + 12V + 12V NC GND SMB_CK SMB_DAT GND + 3.3V TRST# +3.
6.
6.7 LPC Debug CN37: CN40: LPC Debug header 1 2 19 20 LPC Test Connector (compatible with ADLINK LPC Debug Card) 1 2 11 12 Pin Signal Pin Signal 1 3 5 7 9 11 13 15 17 19 LPC_CLK LPC_FRAME# LPC_RST# LPC_AD3 + 3.
6.8 I2C and SMB Bus CN33: (for user access) I2C Bus 1 CN34: SMB Bus 1 Pin Signal 1 2 3 4 +5V I2C_DAT I2C_CK GND Pin Signal 1 2 3 4 +5V SMB_DAT SMB_CK GND I2C/SMBus Buffers These buffers settings are for isolation of the I2C and SMBus - test feature only.
I2C EEPROM Address Selection JP29 to JP31 configure the address of the A0, A1 and A2 bits of the I2C EEPROM JP29: JP30: JP31: I2C EEPROM A0 I2C EEPROM A1 I2C EEPROM A2 1 2 3 Jumper Status 1-2 2-3 A0_HIGH "1" A0_LOW "0" <<<< 1 2 3 Jumper Status 1-2 2-3 A1_HIGH "1" A1_LOW "0" <<<< 1 2 3 Jumper Status 1-2 2-3 A2_HIGH "1" A2_LOW "0" <<<< Note: Express-BASE6 User’s Manual <<<< indicates default setting Page 21
6.9 USB and LAN CN15: CN45: CN18: Page 22 USB x4 Connector USB 3.0 x4 Connector RJ-45 GbE Pin Signal 1 2 3 4 +5V USBUSB+ Ground Pin Signal 1 2 3 4 5 6 7 8 9 USB3.
6.
6.11 VGA, LVDS CN9: LVDS Flat Panel Connector CN8A: VGA CN10: Backlight Control 2 1 8 7 Pin Signal Pin Signal 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 LVDS_I2C_DAT N.C GND LVDS_A0+ LVDS_A1LVDS_BKLT_EN LVDS_A2LVDS_A_CKN.C LVDS_A3LVDS_B0GND LVDS_B1+ LVDS_B2GND LVDS_B_CKLVDS_B3+ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 LVDS_I2C_CK N.C LVDS_A0LVDS_VDD_EN LVDS_A1+ LVDS_A2+ N.C LVDS_A_CK+ LVDS_A3+ GND LVDS_B0+ LVDS_B1GND LVDS_B2+ LVDS_B_CK+ N.
6.12 LVDS Jumper Settings JP5: Backlight Power Voltage Selects the Backlight Power voltage on CNY8 Backlight Control pin header (pin 8). JP6: Panel Power Voltage Selects the Panel Power voltage on CNY8 Backlight Control pin header (pin 2). JP7: Backlight Enable Signal Type Sets the Backlight Enable Signal to "Normal" or "Inverse" type. JP8: Brightness Control Sets the Panel Brightness Control (CNY8 pin 3: Backlight CTRL) to Voltage Level or PWM .
6.13 Keyboard & Mouse CN19: Mouse (top) 6 5 4 3 2 1 Keyboard (bottom) 6 5 4 3 2 1 Pin Signal 1 2 3 4 5 6 MSDAT NC GND KB5V MSCLK NC Pin Signal 1 2 3 4 5 6 KBDAT NC GND KB5V KBCLK NC 6.
6.
6.16 Fan Connectors JP35, JP36, JP37: 1 2 3 FAN1-3: 12V Fan Power 1 FAN4: 5V Fan Power 3 2 1 4 Jumper Status 1-2 2-3 4-pin 3-pin Pin Signal 1 2 3 4 GND Fan Power 12 V Fan Speed Sense Fan Speed Control (PWM) Pin Signal 1 2 3 Fan Power 5V GND Fan Speed Sense FAN3 PWM is controlled by the module (B101: FAN_PWMOUT, B102: FAN_TACHIN). The "sense" and "speed" signals of FAN1/2/4 are connected to the Super IO.
6.17 Power Connectors CN1: ATX 24-pin Power Connector Connect the ATX 24-pin (or 20-pin) connector to supply power to the Express-BASE6 carrier. CN5: +3.3 V -12 V COM PWR_ON COM COM COM -5 V +5 V +5 V +5 V COM 13 14 15 16 17 18 19 20 21 22 23 24 ATX 12V 4-pin Connector Connect the ATX 12V 4-pin connector to supply power to the COM Express module. 2 4 1 3 1 2 3 4 5 6 7 8 9 10 11 12 +3.3 V +3.3 V Ground +5 V Ground +5 V Ground PWR_GOOD +5 VSB +12 V +12 V +3.
6.18 Power Jumper Settings CN2: JP1: PWR_OK Config Jumper Status 1-2 3-4 5-6 Add 3.3V Pullup with 10K to signal PWR_OK Connect PWRGOOD of ATX power supply <<<< Connect PWRGOOD of onboard DCDC regulator AT/ATX MODE In AT mode, JPY1 shorts PS_ON# to ground directly to force power on. See 8.6 AT Power Mode on p. 38.
6.19 Other Connectors 1 2 Pin Signal Pin Signal 1 3 5 7 GPI0 GPI1 GPI2 GPI3 2 4 6 8 GPO0 GPO1 GPO2 GPO3 Pin Signal Pin Signal 1 2 3 4 5 6 7 8 9 10 Power_LED WDT_LED GND NC GND GND NC PS_ON 5V STB SIO_PME 11 12 13 14 15 16 17 18 19 20 BUZZER NC NC +5V SYS_RESET GND ATA_ACT +3.3V PWR_BTN GND CN41/42: Digital I/O Pin Signal Pin Signal The Express-BASE6 provides GPIO expansion for I²C applications via a Phillips PCA955 with 16-bit I²C I/O port and interrupt (for CN41 n=0, for CN42 n=1).
CN43: U55: Feature Connector 1 2 39 40 Secondary SPI BIOS Socket See JP23/JP24 BIOS Selection Jumpers on page 32 and 7.1 SPI Secondary BIOS on page 34 for detailed information.
6.20 Other Jumper Settings JP4: Clear CMOS To clear CMOS, shut down the power and short pins 2 and 3 (shorts VBAT to ground). JP17: RSVD JP18: Super I/O Enables/disables the Super IO. By default, the Express-BASE6 enables the onboard W83627DHG-PT Super I/O. To disable the Onboard Super I/O, short pins 2-3 of Jumper JP18. JP23/24: BIOS Selection See 7.1 SPI Secondary BIOS on page 34 for a detailed description.
7 Secondary BIOS The Express-BASE6 supports Secondary BIOS using Serial Peripheral Interface (SPI) for COM.0 Rev. 2.0 modules.
7.1 SPI Secondary BIOS SPI is supported by PICMG COM.0 Rev. 2.0 to provide a Secondary BIOS for COM Express Rev 2.0 modules that support a SPI Secondary BIOS. To use the BIOS on the module: f Short pins 1-2 on both JP23 and JP24. To use the SPI BIOS on the carrier board: f Short pins 1-2 on JP23, pins 2-3 on JP24. Open the SPI BIOS socket and insert the secondary BIOS flash chip.
8 Switches, POST, LEDs & Power 8.1 Mini Switches (SW1~4) There are two mini switches at the top left corner of the board. SW1 The SW1 switch is the ATX Power Button. The SW2 switch is the Reset Button. SW2 SW3 SW4 At the top edge of the board are two more switches. The SW3 switch is the Sleep Button and the SW4 switch is the Lid Button. Both buttons support Type 6 modules for ACPI power management behavior settings in an OS environment. 8.
8.3 POST & Indicator LEDs An LPC based POST display is added for debugging. The two LEDs shows the actual POST data. A row of mini LEDs to the left of the POST display indicates the following: 8.4 LED1 5Vsb: ATX power attached on standby or active LED3 PWR: Indicates power on LED20 HDD: Indicates hard drive activity LED23 S3: Indicates S3 status Digital I/O LEDs LED12 - LED19 are indicators for the Digital I/O connector CN41. When the I/O signal is high, the LED will light.
8.5 ATX Power Connectors The Express-BASE6 has one ATX 24-pin connector to supply power to the carrier board and one ATX 12V 4-pin connector to supply power to the COM Express module. ATX 24-pin Connector ATX 12V 4-pin Connector The system will not power on unless an ATX 12V 4-pin connector is connected. If your power supply has a 24-pin ATX connector, then attach the connectors as shown.
8.6 AT Power Mode To operate the system in AT Mode with an ATX power supply, use the AT mode PSU converter cable (no 5Vsb) to connect the ATX 20/24-pin power connector to the carrier board as shown. Set the ATX/AT Mode jumper JP1 to AT Mode as described in 6.17 Power Jumper Settings.
Important Safety Instructions For user safety, please read and follow all instructions, warnings, cautions, and notes marked in this manual and on the associated equipment before handling/operating the equipment. f Read these safety instructions carefully. f Keep this user’s manual for future reference. f Read the specifications section of this manual for detailed information on the operating environment of this equipment.
Getting Service Contact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan ᄅؑקխࡉ৬ԫሁ 166 ᇆ 9 ᑔ Tel: +886-2-8226-5877 Fax: +886-2-8226-5717 Email: service@adlinktech.com Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co., Ltd.
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