cPCI/PCI-8554/R Multi-functions Counter / Timer Card User’s Guide Recycle Paper
©Copyright 1998~2002 ADLINK Technology Inc, All Rights Reserved. Manual Rev. 1.02: July 31, 2002 Part No: 50-11130-100 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents Tables ........................................................................................iii Figures.......................................................................................iv How to Use This Guide.............................................................v Chapter 1 Introduction..............................................................1 1.1 1.2 1.3 1.4 Features.......................................................................................................
3.4 3.5 3.6 Timer / Counter Clock Mode Control........................................................ 28 Digital Input Register................................................................................... 28 Digital Output Register............................................................................... 29 Chapter 4 Signal Connections & Applications ....................30 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 Connectors Pin Assignment...............................................................
Tables Table 1. Default Jumper Settings on PCI-8554......................................10 Table 2. Extra Default Jumper Setting on cPCI-8554/R ........................10 Table 3. Counters label relationship ........................................................15 Table 4. I/O Address Map of cPCI/PCI-8554/R .......................................26 Table 5. Timer/Counter Registers ............................................................27 Table 6. Timer/Counter Clock Mode Control Register.
Figures Figure 1: Functional Block diagram .............................................................2 Figure 2: PCB Layout of PCI-8554................................................................8 Figure 3: PCB Layout of cPCI-8554/R..........................................................9 Figure 4: Pin Assignment of PCI-8554 Connector CN1.........................13 Figure 5: Pin Assignment of cPCI-8554/R Connector CN1...................14 Figure 6: Block Diagram of 8254 Counter .........
How to Use This Guide This manual is designed to help you use the cPCI/PCI-8554/R. The manual describes how to modify various settings on the cPCI/PCI8554/R card to meet your requirements. It is divided into 5 chapters: Chapter 1, “Introduction,” gives an overview of the product features, applications, and specifications. Chapter 2, “Installation & Configurations” describes the operation method and multi -functions of the cPCI/PCI8554/R.
1 Introduction cPCI/PCI-8554/R is a general-purpose counter / timer and digital I/O card. The card is designed with four 8254, a programmable interval timer/counter chip, totally, providing twelve 16-bit down counter or frequency dividers. Three different types of interface are available: PCI (PCI-8554), CompactPCI (cPCI-8554), and CompactPCI with rear I/O connection (cPCI-8554R) for various platforms and applications. The card has multi -configurations.
Figure 1: Functional Block diagram 1.1 Features The cPCI/PCI-8554/R Counter / Timer and digital I/O Card provides the following advanced features: • Four 8254 chips provide twelve 16 bits down counters • Multi-configurations of counters / timers: • Flexible setting for each independent counter, the clock source could be external, internal or cascaded. The gate signal is external controlled or internal enabled.
1.2 1.
• Gate control: default enable or external control Digital Filter Circuits • Device: MC14490 • De-bounce clock: (Programmable) P 8MHz internal base clock P Programmable counter 11 output Digital I/O (DIO) • No. of input channels : 8 channels • No.
1.4 Software Supporting ADLINK provides versatile software drivers and packages for users’ different approach to building a system. ADLINK not only provides programming libraries such as DLL for most Windows based systems, but also provide drivers for many other software packages such as LabVIEW®, HP VEETM, DASYLabTM, InTouchTM, InControlTM, ISaGRAFTM, and so on. All software options are included in the ADLINK CD. Non-free software drivers are protected with licensing codes.
1.4.2 ® PCIS-LVIEW: LabVIEW Driver PCIS-LVIEW contains the VIs, which is used to interface with the NI LabVIEW® software package. The PCIS-LVIEW supports Windows 95/98/NT/2000. The LabVIEW® drivers are shipped free with the board. For more information about PCIS-LVIEW, please refer to the user’s guide in the CD. (\\Manual_PDF\Software\PCIS-LVIEW) 1.4.3 PCIS-VEE: HP-VEE Driver The PCIS-VEE includes user objects, which are used to interface with the HP VEE software package.
2 Getting Started This chapter discusses how to setup the cPCI/PCI-8554R and configure the card to meet the requirements of your application. The contents of the package and unpacking information that you should be aware off are outlined first. 2.
Inspect the card module carton for obvious damages. Shipping and handling may cause damage to your module. Be sure there are no shipping and handling damages on the modules carton before continuing. After opening the card module carton, extract the system module and place it only on a grounded anti-static surface with component side up. Again, inspect the module for damages. Press down on all the socketed IC's to make sure that they are properly seated.
Figure 3: PCB Layout of cPCI-8554/R 2.4 Default Jumper Setting To operate the cPCI/PCI-8554/R correctly, users need to understand the structure of cPCI/PCI-8554/R and details of the possible configurations. The functional block diagram of the cPCI/PCI-8554/R is shown in figure 1 of chapter 1. The following section lists the default jumper setting on the cPCI/PCI-8554/R.
ECLK9 No Debounce function JP9 ECLK10 No Debounce function JP10 E_INT No Debounce function JP11 ECLK11 Internal 8MHz Clock JP12 ECLK12 Output of CLK11 JP13 Table 1. Default Jumper Settings on PCI-8554 Items Default Configuration Set by GATE11 Vcc JP14 GATE12 Vcc JP15 Table 2. Extra Default Jumper Setting on cPCI-8554/R There are 13 jumpers available on the PCI-8554, and 15 jumpers on the cPCI-8554/R, h t e first 11 jumpers are used to select the debounce function.
2.5 2.5.1 cPCI/PCI-8554/R Installation Hardware configuration The PCI cards (or CompactPCI cards) is equipped with the plug and play PCI controller, it has the ability to request base addresses and interrupts according to the PCI standard. The systems BIOS will install the system resources based on the PCI cards’ configuration registers and system parameters (which are set by system BIOS). Interrupt assignments and memory usage (I/O port locations) of the PCI cards are also assigned by system BIOS.
2.6 Device Installation for Windows Systems Once Windows 95/98/2000 has started, the Plug and Play function of the Windows OS will find the new NuDAQ/NuIPC cards. If this is the first time a NuDAQ/NuIPC cards is installed into the computer system. The Windows operating system will inform you to input the device information source. Please refer to the “Software Installation Guide” for installation procedures.
2.
(1) (2) (3) (48) (49) (50) (51) (52) (53) (98) (99) (100) (1) +12V (26) GND (51) GND (76) ECLK9 (2) +12V (27) GND (52) GOUT2 (77) COUT8 (3) +12V (28) GND (53) GIN2 (78) GATE8 (4) Vcc (29) GND (54) GND (79) ECLK8 (5) Vcc (30) GND (55) GOUT1 (80) COUT7 (6) Vcc (31) GND (56) GIN1 (81) GATE7 (7) GATE12 (32) GND (57) E_INT (82) ECLK7 (8) DI_6 (33) GND (58) DI7 (83) COUT6 (9) DI_4 (34) GND (59) DI5 (84) GATE6 (10) DI_2 (35) GND (60) DI3 (85) ECLK6 (11) DI_0 (36) GND (
2.8 Clock System The clock system of the cPCI/PCI-8554/R provides the internal clock source for the 8254 chips. The clock for counter/timer 1 ~ 10 can be one of 4 sources; an external clock source, a cascaded source from the ‘last’ channel, CK1 or COUT10. The next section will outline details on setting the clock for each counter/timer and CK1. The clock of counter/timer 11 is fixed at 8Mhz, and the clock of counter/timer 12 is connected to COUT11 2.
There are three signals (2 input and 1 output) for each counter, a clock input signal, a gate control signal, and an output signal. Figure 6 illustrates the block diagram of the 8254 counter. CLK1 ~ CLK12 are clock sources, GATE1 ~ GATE12 are gate control signals and COUT1 ~ COUT12 are outputs of the counters. Figure 7 shows the interconnection of the 8254 counters and the labels associated to each counter.
2.9.1 Independent Counters (Counter 1~10) Counters 1 to 10 are independent counters because the clock source and gate control of those counters can be set independently (Thus named Independent Counter). 8254 Chip #1 CLK1 C GATE1 Counter #1 COUT1 O G Figure 8: Example of ‘independent counters’ 2.9.2 Cascaded Counters The connection of Counter 11 and 12 are different from the independent counters. These two counters are cascaded counters by default settings.
Figure 10: Cascaded Counter Configuration 2.9.3 User Configurable Cascaded Counters Although by default there is only one cascaded counter, users can configure the independent counters to be in a cascaded arrangement by using the _SET_cntCLK_ function. . Figure 11 illustrates the user programmable-cascaded counter. Refer to the next section for details of the clock source options.
2.10 Clock Source Configurations For each independent counter, one of four different clock sources maybe selected using the software. The clock source of counter n can be either an external clock source (ECLK n), a cascaded counter output (COUTn1), CK1 or COUT10. Note: 1. The clock source of cascaded counter 11 is set at C8M (8MHz) and counter 12 is set to COUT11. 2. The external clock source labelled ECK n comes from JP1 ~ JP10, see section 2.
The internal clock sources of CK1 can be either C8M or COUT11, and is selected by using the “_8554_SET_CK1” function. If the counters are set in a cascaded configuration, then the clock source will be from the output of the previous counter (Counter n-1). For example, COUT1 is cascaded to CLK2; COUT3 is cascaded to CLK4 and so on. (Note: If counter 1 is set in cascaded mode, CLK1 is connected to GND because COUT0 doesn’t exist). 2.
2.13 Debounce System The debounce system is used to eliminate the affects of bounce phenomenons. If an external clock is used, user can set JP1 ~ JP11 to select, whether or not to used the debounce system.
DB_CLK input signal output signal glitch is eliminated Figure 17: Basic Timing of the debounce system 2.14 Interrupt System The cPCI/PCI-8554/R‘s interrupt system is a powerful and flexible system, which is suitable for many applications. The system is a Dual Interrupt System. Dual Interrupt means the hardware can generate two interrupt request signals simultaneously and the software is able to respond and invoke the ISR. Note that dual interrupt do not mean the card will occupy two IRQ levels.
Even though it is a dual interrupt system, only one interrupt level is ever used. The card uses the INT #A interrupt request signal on the PCI bus. The motherboards circuits will then transfer INT #A to one of the AT bus IRQ levels. The IRQ level is set by the PCI plug and play BIOS and is saved in the PCI controller. It is not necessary for users to set the IRQ level. Users can however read back the IRQ level setting by using the software library. Refer to the section 5.4.
2.16 12V and 5V Power Supply The 100-pin SCSI-II connector provides +12 and +5 volt power sources. To avoid shorts or overloads of the power sources, thermistors are added to all power supply rails. The current rating of the +5 volt supply thermistor is 500 mA. If the load current is larger than 500mA, the resistance of the thermistors will increase due to the temperature rise. The rising resistance drops the supply voltage and hence reduces the current.
3 Registers Detailed descriptions of the registers are specified in this chapter. This information is useful for programmers who wish to handle the card with low-level programming. However, we suggest users to an understanding of the PCI interface before starting any low-level programming. In addition, the contents of this chapter will also help users understand how to use the software drivers to configure this card. 3.
call. Do not attempt to modify the base address and interrupt that have been assigned by the PCI PnP BIOS, it may cause resource conflicts with your system. 3.2 I/O Address Map All cPCI/PCI-8554/R registers are 8 bits long. Users can access these registers using 8-bit I/O instructions. The following table shows the registers address map, including descriptions and their offset addresses relative to the base address.
3.3 Timer/Counter Registers The 8254-chips occupies 4 I/O address locations on the cPCI/PCI8554/R as shown below. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features available at the following websites: “http://support.intel.com/support/controllers/peripheral/231164.htm” or http://www.tundra.com (for Tundra’s 82C54 datasheet.
3.4 Timer / Counter Clock Mode Control There are a total of twenty-two bits on the cPCI/PCI-8554/R used for selecting clock sources for Timer/Counter 1 ~ 10, CK1 and the debounce system. Address: BASE + 0x10 ~ 0x12 Attribute: write only Data Format: Bit 7 6 5 4 3 2 1 0 Base+0x10 C4N2 C4N1 C3N2 C3N1 C2N2 C2N1 C1N2 C1N1 Base+0x11 C8N2 C8N1 C7N2 C7N1 C6N2 C6N1 C5N2 C5N1 C9N2 C9N1 Base+0x12 - DBCSEL Table 6.
3.6 Digital Output Register This register is a general-purpose 8 bits digital output port. These signals can be used to control external devices. Address: BASE + 0x18 Attribute: write only Data Format: Bit 7 6 5 4 3 2 1 0 Base+0x18 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Table 8.
4 Signal Connections & Applications This chapter describes the connectors and applications of the cPCI/PCI8554/R including signal connections between the cPCI/PCI-8554/R and external devices. 4.1 Connectors Pin Assignment The cPCI/PCI-8554/R comes equipped with a 100-pin SCSI-II female connector (CN1). CN1 is located at the rear plate. The pin assignment of the connector is illustrated in the Figure 4 and 5 of section 2.1. 4.
4.3 Timer/Counter Connection The cPCI/PCI-8554/R has four 8254 chips on board. It can offer 10 independent 16-bit programmable down counters with the option of cascading the counters. To implement your application, the following procedures should be followed. 1. Does the application require a fixed frequency, if answer is ‘No’, an external clock source must be used. Go to step 3. 2.
4.4 Frequency Generator 4.4.1 To generate a 250 KHz Square Wave. Step 1: Use a fixed clock source because the output is a fixed frequency. Step 2: The internal 8MHz clock is capable of generating the 250KHz frequency. Use Counter 1 for this application. ? 250 kHz = 8MHz/32 Step 3: The gate source should be set to “enable” always and therefore GATE1 is let open (pin 99 of CN1). Step 4: Connect the counter output to an external device and write the control program. Refer to ‘DEMO1.C’ source code.
4.4.2 To generate a 1 pulse/1 hour signal Step 1: Use a fixed clock source because the output is a fixed frequency. Step 2: As the desired frequency is too slow, one counter will be unable to produce the desired frequency (1/3600sec=0.000278Hz. Therefore to reach this low frequency, cascade the independent counters 1, 2 and 3. Set the clock source of counter 1 to the internal 8MHz. Connect COUT1 to clock source of counter 2, and connect COUT2 to clock source of counter 3.
4.5 Pulse Width Measurement Step 1: Use a fixed clock source as base time interval (or base frequency). Step 2: Assuming an internal 2MHz clock is used. The time base is: ∆t = 1/2M=5x10e-7 sec The count range for measuring the pulse width is: ∆t < pulse width < ∆t *65535 (=32.768 msec) If the specification of the pulse width to be measured is within the range, the 2MHz can be used.
4.6 Frequency Measurement To measure a frequency around 1~100 KHz the following steps can be followed. Step 1: This application requires two counters. One counter is used to generate a pulse with a precise time interval. The pulse is then used to enable the second counter (Counting counter). In this example the gate control is from COUT3 and cascaded counters configuration is used. The pulse generator is set to counter 3 (clock from COUT2) and counter 1 is used to measure the frequency.
Figure 23: Example of frequency measurement (1) 36 • Signal Connection and Applications
4.7 Event Counter This example counts how many external events in 1 second Step 1: This application requires one counter to generate a time base of 1 second and the second counter to count the event. Cascaded counters 11and 12 are used as a watchdog timer. Counter 1 is used in this example to count the external events. The clock source of counter 1 is the event signal so the frequency is not fixed. Step 2: Connect ECLK1 to the signal to be measured and adjust JP1 to enable the debounce function.
4.8 Dual Interrupt System The cPCI/PCI-8554/R provides a dual interrupt source (one internal plus one external), which can be very useful in some applications. For example, most applications require a watchdog timer to monitor the system periodically; hence, an IRQ channel is used. An emergency control may also be necessary; therefore the external IRQ channel will come in handy.
5 C/C++ Library This chapter describes the software libraries for operating this card. Only the functions in the DOS library and Windows 95 DLL are described. Refer to the PCIS-DASK function reference manual, which is included in the ADLINK CD, for descriptions of Windows 98/NT/2000 DLL functions. The function prototypes and useful constants are defined in the header files located in the LIB directory (DOS) and INCLUDE directory (Windows 95).
5.2 Programming Guide 5.2.1 Naming Convention The functions of the NuDAQ PCI or NuIPC CompactPCI card software drivers uses full-names to represent the functions' real meaning. The naming convention rules are: In DOS Environment: _{hardware_model}_{action_name}. e.g. _8554_Initial(). In order to recognize the difference between the DOS library and Windows 95 library, a capital "W" is placed at the start of each function name for Windows 95 DLL drivers. e.g. W_8554_Initial(). 5.2.
5.3 _8554_Initial @ Description The cPCI/PCI-8554/R cards are initialized by this function. The software library could be used to control multiple cPCI/PCI-8554/R cards. Because the cPCI/PCI-8554/R is designed with the PCI bus architecture and meets the plug and play specifications, the IRQ and I/O address are assigned by system BIOS directly.
5.4 _8554_Write_Counter @ Description User can directly write commands to counters 1~12 using this function.
5.5 _8554_Read_Counter @ Description User can directly read counter information with this function. @ Syntax C/C++ (DOS) U16 _8554_Read_Counter (U16 cardNo, U16 cntNo, U16 *mode, U16 *cntrVal) C/C++ (Windows 95) U16 W_8554_Read_Counter (U16 cardNo, U16 cntNo, U16 *mode, U16 *cntrVal) Visual Basic (Windows 95) W_8554_Read_Counter (ByVal cardNo As Integer, ByVal cntNo As Integer, mode As Integer, cntrVal As Integer) As Integer @ Arguments cardNo: card number to be selected cntNo: Counter/Timer number.
5.6 _8554_Stop_Counter @ Description User can directly stop the counter with this function. This function will stop the counter by setting the counter to mode 5.
5.7 _8554_Read_Status @ Description User can directly read current counter status with this function.
5.8 _8554_DO @ Description Write an 8-bit data to the digital output port.
5.9 _8554_DI @ Description Read an 8-bit data from the digital input port.
5.10 _8554_SET_cntCLK @ Description This function is used to select the clock source for counters 1~10 (Clock source for counter 11 is 8MHz and clock source of counter 12 is from COUT11, both clock sources are fixed).
5.11 _8554_SET_CK1 @ Description Select source for CK1.
5.12 _8554_SET_DBCLK @ Description Select debounce clock.
5.13 _8554_Set_INT_Control @ Description The cPCI/PCI-8554/R has a dual interrupts system. Two interrupt sources can be generated and be checked by the software. This function is used to select and control the cPCI/PCI-8554/R interrupt sources. The interrupt source can either come from counter 12’s output, COUT12 (INT1) or from an external interrupt signal EXTINT (INT2).
5.14 _8554_Get_IRQ_Status @ Description The cPCI/PCI-8554/R has dual interrupts system. Two interrupt sources can be generated and be checked by the software. This function is used to distinguish which interrupt has been inserted if both INT1 and INT2 interrupts are used.
5.15 _8554_INT_Enable @ Description This function is only available to the Windows 95 driver. It is used to activate the interrupt controller. After calling this function, every time an interrupt request signal is generated, a software event is signaled.
5.16 _8554_INT_Disable @ Description This function is only available to the Windows 95 driver. It is used to disable the generation of an interrupt signal. @ Syntax C/C++ (Windows 95) U16 W_8554_INT_Disable (U16 cardNo) Visual Basic (Windows 95) W_8554_INT_Disable (ByVal cardNo As Integer) As Integer @ Arguments cardNo: card number to be selected @ Return Value ERR_NoError, ERR_BoardNoInit 5.17 _8554_CLR_IRQ1 @ Description This function is only available to the DOS driver.
5.18 _8554_CLR_IRQ2 @ Description This function is only available to the DOS driver. It is used to clear the interrupt request, which is generated by INT2. You should use this function to clear the interrupt request status; otherwise the new incoming interrupt will not be generated.
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