NuDAQ® PCI-9820 2-CH, 130MS/s, 14-Bit, Simultaneous-Sampling Digitizer User's Guide Recycle Paper
©Copyright 2003 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 1.00 Sep 19, 2003 Part No: 50-11133-100 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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Table of Contents Tables ........................................................................... iii Figures.......................................................................... iv How to Use This Guide................................................. v Chapter 1 Introduction ................................................. 1 1.1 1.2 1.3 1.4 Features................................................................................3 Applications ......................................................
4.4 Trigger Sources ..................................................................24 4.4.1 4.4.2 4.4.3 4.5 4.6 4.7 Data Transfers....................................................................26 AI Data Format ...................................................................27 Synchronizing Multiple Devices..........................................28 4.7.1 4.7.2 4.7.3 4.7.4 4.8 Software-Trigger ............................................................. 24 External Analog Trigger .........
Tables Table 3.1 Table 3.2 Table 4.1 Table 4.2 Table 4.3 Signal Locations...........................................................16 Location of solder switches..........................................17 Analog trigger ideal transfer characteristic ..................25 Analog input voltage and the output digital code .........27 Summary of SSI timing signals and the corresponding functionalities ...............................................................
Figures Figure 1.1: PCI-9820 block diagram................................................9 Figure 3.1: Location of connectors ................................................16 Figure 3.2: Location of solder switches.........................................17 Figure 4.1 Post trigger...................................................................21 Figure 4.2 Pre trigger (the trigger event occurs after the specified amount of data has been acquired)...............................................
How to Use This Guide This manual is designed to help users understand the PCI-9820. It is divided into four chapters: Chapter 1 Introduction Gives an overview of the product features, applications, and specifications. Chapter 2 Installation Describes how to install the PCI-9820. Chapter 3 Signal Connections Describes connector pin assignments.
1 Introduction The ADLINK PCI-9820 is a 65MS/s, high-resolution PCI digitizer with deep SODIMM SDRAM memory that features flexible input configurations, including programmable input ranges and user-selectable input impedance. With the deep on-board acquisition memory, the PCI-9820 is not limited by the PCI’s 132MB/s bandwidth, and can record the waveform for extended periods of time.
The PCI-9820 device supports SODIMM SDRAM ranging from 64MB to 512MB. The digitized data is stored in the on-board SDRAM before being transferred to host memory. The PCI-9820 uses scatter-gather bus mastering DMA to move data to the host memory. If the data throughput from the PCI-9820 is less than the available PCI bandwidth, the PCI-9820 also features on-board 3k-sample FIFO to achieve real-time transfer bypassing the SDRAM, directly to the host memory.
1.1 1.2 Features • Supports 32-bit 3.
1.
±1V 1.75 • Crosstalk: < -80dB, DC to 1MHz • Total Harmonic Distortion (THD)*: -75dB • Signal-to-noise ratio (SNR)*: • Range SNR (dB) ±5V 66 ±1V 62 Spurious-free dynamic range (SFDR)*: 75dB *Measured using 200kHz sine wave input with amplitude of 95% of full scale at 60MS/s ♦ Timebase System • Sources: Internal 60MHz, external sine wave, SSI TIMEBASE • External sine wave source: Connector: SMB Impedance: 50Ω Coupling: AC Input amplitude: 1Vpp to 2Vpp Overvoltage protection: 2.
• Analog triggering Sources: CH0 and CH1 Slope: rising/falling Coupling: DC Trigger sensitivity: 256 steps in full-scale voltage range Hysteresis: 1.5% of the full range Offset error: 1.25% of the full range • Digital triggering Connectors: SMB Slope: rising/falling Compatibility: 5V/TTL Minimum pulse width: 20ns ♦ Calibration • Recommended warm-up time: 15 minutes • On-board calibration reference: Level: 5.
Ambient temperature: 0 to 50°C Relative humidity: 10% to 90% non-condensing • Storage environment : Ambient temperature: -20 to 80°C Relative humidity: 10% to 90% non-condensing • Power requirement: (typical) Power Rail Current (mA) 5V 895 12V 295 3.3V 310 (with 128MB onboard SDRAM memory) 430 (with 512MB onboard SDRAM memory) 1.4 Software Support ADLINK provides versatile software drivers and packages for users’ differing approaches to building up a system.
• WD-DASK: Includes device drivers and DLLs for Windows 98, Windows NT, and Windows 2000. DLL is a binary compatible across Windows 98, Windows NT, and Windows 2000. All applications developed with WD-DASK are compatible across Windows 98, Windows NT, and Windows 2000. The developing environment can be VB, VC++, Delphi, BC5, or any Windows programming language that allows calls to a DLL. The user’s guide and function reference manual of WD-DASK are in the CD (\Manual_PDF\Software\WD-DASK).
Users can also get a free 4-hour evaluation version of DAQBench from the CD. Please contact ADLINK or an ADLINK dealer to purchase the software license. 1.5 Block Diagram External timebase input Clock SSI generation External digital trigger I/O AI1 analog circuitry AD converter SDRAM AI0 analog circuitry FPGA AD converter Logic PCI controller Figure 1.
2 Installation This chapter describes how to install the PCI-9820. The contents of the package and unpacking information are also outlined. The PCI-9820 performs an automatic configuration of the IRQ and port address. Users can use the software utility, PCI_SCAN, to read the system configuration. 2.
2.2 Unpacking Your PCI-9820 card contains electro-static sensitive components that can be easily be damaged by static electricity. Therefore, the card should be handled on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damage. Shipping and handling may cause damage to the module. Be sure there is no shipping and handling damage on the module carton before continuing.
2.3 PCI Configuration 1. Plug and Play: As a Plug and Play component, the card requests an interrupt number via its PCI controller. The system BIOS responds with an interrupt assignment based on the card information and on known system parameters. These system parameters are determined by the installed drivers and the hardware load seen by the system. 2. Configuration: The board configuration is done on a board-by-board basis for all PCI boards on your system.
3 Signal Connections This chapter describes the connectors of the PCI-9820, and the signal connections between the PCI-9820 and external devices. 3.1 Connectors Fig. 3.1 shows the location of connectors on the PCI-9820. The connector types and functions are described as follows. CLK IN: The SMB connector is a 50Ω, AC-coupled external reference timebase input. TRG IO: The SMB connector is for external digital trigger input or output.
SSI: The SSI connector is the System Synchronization Interface for synchronizing multiple cards.
3.2 Analog Input Impedance Setting 3.2.1 Analog Input Impedance Setting The CH0 and CH1 input impedance can be selected to 50Ω or 1.5MΩ by soldering gap switches J6 and J7 on the backside of the PCI-9820. The location of J6, J7 and the corresponded input impedance setting are shown in Fig. 3.2 and Table 3.2. The default setting is 50Ω input impedance. J6 Open Close (Default) CH0 Input Impedance High (1.5MΩ) Low (50Ω) J7 CH1 Input Impedance Open Close (Default) High (1.5MΩ) Low (50Ω) Table 3.
NOTE: If the high input impedance 1.5MΩ is selected, the output impedance of the signal sources should be kept low to avoid of the offset voltage caused by the input bias current, which is 2μA min. and 25μA max.
4 Operation Theory The operation theory of the PCI-9820 is described in this chapter, including the control and setting of signal sources, timebase sources, trigger sources, trigger modes, data transfers, synchronizing multiple cards, and auto-calibration. 4.1 Analog Input Signal Source Control Number of Channels The PCI-9820 provides two simultaneously sampled analog input channels in SE (single ended) connection. Each channel can be enabled individually.
Once choosing the timebase source, users can set a 24-bit counter to divide the timebase to get the needed sampling rate. The following formula determines the ADC sampling frequency: Sampling Rate = Timebase Frequency / ADC Clock Divisor where the ADC Clock Divisor = 1,2,3,4,5… 224-1(maximum) For more information about SSI timebase, please refer to section 4.5 4.2.1 External sine wave clock source Users can supply the timebase from external SMB connector CLK IN, which should be a sine wave signal.
Use post-trigger acquisition when you want to collect data after the trigger event, as illustrated in Fig 4.1. Operation start Trigger event Acquisition stop Acquired & stored data with the specified amount Time Figure 4.1 Post trigger 4.3.2 Pre-trigger Acquisition Use pre-trigger acquisition to collect data before the trigger event. The quisition starts once specified function calls are executed to begin pre-trigger operation, and it stops when the trigger event occurs.
Operation Trigger start event Acquired & stored data Time Specified amount of data Figure 4.3 Pre trigger (The trigger signal is accepted anytime after the operation starts) Trigger signals that occur before the specified amount of data has been acquired (shadow area) will be ignored. Operation start Trigger event Time Specified amount of data Acquired & stored data with the specified amount Figure 4.
Operation start Trigger event Acquired & stored data with the specified amount (M) Acquired & stored data with the specified amount (N) Time Figure 4.5 Middle trigger Like pre-trigger mode, the stored data may be less than the amount specified if the trigger event occurs before the specified amount of data (M) has been acquired. Users can also set by program to ignore trigger signals until the specified amount of data (M) has been acquired. 4.3.
stored in memory. After the initial setup, the process does not require software intervention. Operation start Trigger event Trigger event Acquired Data Acquired Data Time Figure 4.7 Post-trigger with re-trigger 4.4 Trigger Sources In addition to the internal software trigger, the PCI-9820 also supports external analog, digital triggers and SSI triggers. Users can configure the trigger source by software. For SSI trigger operation, please refer to section 4.7. 4.4.
0x01 -4.96V -0.992V Table 4.1 Analog trigger ideal transfer characteristic The trigger conditions for analog triggers are illustrated in Fig4.8 and described as follows: • Positive-slope trigger - The trigger event occurs when the trigger signal (analog input signal) changes from a voltage that is lower than the specified trigger level to a voltage that is higher than the specified trigger level.
Figure 4.9 External digital trigger input Tw TRG IO Tw = 2 - 3 TIMEBASE clocks Figure 4.10 TRG IO output signal timing 4.5 Data Transfers Since the maximum data throughput on the PCI-9820 (60MS/s * 2 channels * 2 Bytes/channel = 240MB/s) is much higher than the 32bit/33MHz PCI-bus bandwidth, samples are acquired into the onboard SDRAM memory before being transferred to the host computer.
the PCI-9820 also features on-board 3k-sample FIFO to achieve real-time transfer bypassing the SDRAM, directly to host memory. Figure 4.11 Scatter/gather DMA for data transfer 4.6 AI Data Format Table 4.2 illustrates the ideal transfer characteristics of various input ranges of the PCI-9820. Bit13-0 is the acquired 14-bit A/D data with binary coding format while bit14 is the out-of-range indicator (logic “1” means out-of-range).
4.7 Synchronizing Multiple Devices SSI (System Synchronization Interface, please refer to 3.1 for its location) provides the timing synchronization between multiple cards. Users can connect a special ribbon cable (ACL-SSI) to all the cards in a daisy-chain configuration. The bi-directional SSI I/Os provide a flexible connection between cards, which allows one SSI master PCI-9820 to output the SSI signals to up to three slaves PCI-9820s to receive the signals. Table 4.
Fig 4.12 and Fig 4.13 show the input and output timing requirements. Tw SSI_TRIG1 Tw = 2 - 3 TIMEBASE clocks Figure 4.12 SSI_TRIG1 output signal timing Tw SSI_TRIG1 T w = 20 ns minimum Figure 4.13 SSI_TRIG1 input signal timing 4.7.3 SSI_TRIG2 and SSI_START_OP As an output, the SSI_TRIG2 signal is a clocked SSI_TRIG1 signal by TIMEBASE, as illustrated in Fig 4.14. SSI_TRIG1 TIMEBASE Tw SSI_TRIG2 T w = 2 TIMEBASE clocks Figure 4.
Tw SSI_TRIG2 T w = 20 ns minimum Figure 4.15 SSI_TRIG2 input signal timing As an output, the SSI_START_OP signal reflects the operation start signal in a pre-trigger or middle-trigger acquisition sequence. Please refer to Fig 4.2 Fig 4.5 for the relationship between the operation start signal and the acquisition sequence. As an input, the PCI-9820 accepts the SSI_START_OP signal to be the operation start signal in a pre-trigger or middle-trigger acquisition sequence.
may recognize the trigger signal with one-clock time difference because the signal is not related to the timebase. There is another phenomenon if using TRSRC_SSI_2 in pre-trigger and middle-trigger mode. The operation start signal is generated by a software command so multiple PCI-9820 devices don’t start the data acquisition simultaneously, which may result in the fact that the amount of stored samples are different if the trigger event occurs before the specified amount of data has been acquired.
Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully: 1. Before using ADLINK’s products please read the user manual and follow the instructions exactly. 2. When sending in damaged products for repair, please attach an RMA application form. 3. All ADLINK products come with a two-year guarantee, repaired free of charge. • 4. 5. 6.
