PCIe-9814 4-CH 12-Bit 80MS/s Digitizer PCIe-9814/PCIe-9814P User’s Manual Manual Rev.: 2.00 Revision Date: Feb. 13, 2015 Part No: 50-11256-1000 Advance Technologies; Automate the World.
Revision History Revision Release Date 2.
PCIe-9814 Preface Copyright 2015 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
Additional information, aids, and tips that help users perform tasks. NOTE: CAUTION: Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task. Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.
PCIe-9814 Table of Contents Preface .................................................................................... iii List of Figures ....................................................................... vii List of Tables.......................................................................... ix 1 Introduction ........................................................................ 1 1.1 1.2 1.3 Features...............................................................................
3.3.1 Software Trigger ....................................................... 18 3.3.2 External Digital Trigger ............................................. 18 3.3.3 Analog Trigger .......................................................... 18 3.4 Trigger Modes.................................................................... 19 3.4.1 Post Trigger Mode .................................................... 19 3.4.2 Delayed Trigger Mode .............................................. 19 3.4.
PCIe-9814 List of Figures Figure 1-1: Figure 1-2: Figure 1-3: Figure 3-1: Figure 3-2: Figure 3-3: Figure 3-4: Figure 3-5: Figure 3-6: Figure 3-7: Figure 3-8: Figure 3-9: Figure 3-10: Figure 3-11: Figure 3-12: Figure 3-13: Figure 3-14: Figure 3-15: Figure 3-16: List of Figures Analog Input Channel Bandwidth, ±0.2 Vpp............... 4 PCIe-9814 Schematic................................................. 8 PCIe-9814 I/O Array ................................................... 9 Analog Input Architecture ...
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PCIe-9814 List of Tables Table Table Table Table Table Table Table Table Table 1-1: 1-2: 3-1: 3-2: 3-3: 3-4: 3-5: 3-6: 3-7: List of Tables Channel Characteristics................................................... 3 PCIe-9814 I/O Array Legend ......................................... 10 Input Range and Data Format ....................................... 14 Input Range FSR and –FSR Values.............................. 14 Input Range Midscale Values ........................................
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PCIe-9814 1 Introduction The ADLINK PCIe-9814 is a 4-channel, 12-bit, 80MS/s PCI Express digitizer providing speedy, high quality data acquisition. Each of the four input channels supports up to 80MS/s sampling, with12-bit resolution A/D converter. 40MHz bandwidth analog input with 50Ω impedance receives ±0.5V, ±1V, ±5V, and ±10V high speed signals, and a simplified front end and highly stable onboard reference provide both highly accurate measurement results and high dynamic performance.
1.2 Applications X X X X Testing/monitoring for Energy Management applications, including: Z Partial discharge Z Power line/device monitoring Non-destructive testing Radar acquisition LiDAR 1.3 Specifications 1.3.1 Analog Input Item Detail Channels 4 single-ended Connector type SMB input coupling DC ADC resolution 12-Bit Comments input signal range ±0.
PCIe-9814 Item System Noise (RMS) Detail Comments 150 μV ±0.5V 300 μV ±1.0V 1.5 mV ±5V 2.5 mV ±10V AC Dynamic Performance (10MHz, -1dBFS input signal) 50Ω with filter OFF SNR 64dB ±0.5V, ±1V, ±5V THD -74dB ±0.5V, ±1V, ±5V SFDR 76dB ±0.5V, ±1V, ±5V 1MΩ with filter OFF SNR THD SFDR 64dB ±0.5V, ±1V, ±5V, ±10V -71dB ±10V -73dB ±5V -75dB ±0.5V, ±1V 72dB ±10V 74dB ±5V 76dB ±0.5V, ±1V 50Ω with filter ON SNR 65dB ±0.5V, ±1V, ±5V THD -93dB ±0.5V, ±1V, ±5V SFDR 78dB ±0.
&+ %DQGZLGWK ȍ 0 ±5V -1 ±1V ±0.5V -2 -3 dB -4 -5 -6 -7 103 104 105 Hz 106 107 108 Figure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp 1.3.2 Timebase Sample Clock Detail Timebase options Internal : onboard crystal oscillator Comment External : CLK IN (front panel) Sampling clock frequency Timebase accuracy 4 Internal : 80MHz 1.
PCIe-9814 Sample Clock Detail External reference clock source SDI0 (supported by PCI-9814P only) External reference clock 10MHz External reference clock input range 3.3V to 5V TTL DC compliant External sampling clock input range 1Vpp to 5Vpp AC / DC compliant 1.3.
1.3.4 General Specifications Specifications Dimensions 167.64 W x 106.68 H mm (6.53 x 4.16 in) Bus interface PCI Express Gen 1 x 4 Operating Temperature: 0°C - 50°C Relative humidity: 5% - 95%, non-condensing Storage Temperature: -20°C - +80°C Relative humidity: 5% - 95%, non-condensing Calibration Onboard reference +1.8V, +0.9V, and +0.45V Temperature coefficient 1.
PCIe-9814 trial/demonstration purposes for only up to two hours. Contact your ADLINK dealer to purchase the software license. 1.4.1 WD-DASK WD-DASK includes device drivers and DLL for Windows XP/7/8. DLL is binary compatible across Windows XP/7/8. This means all applications developed with WD-DASK are compatible with these Windows operating systems. The development environment may be VB, VB.NET, VC++, BCB, and Delphi, or any Windows programming language that allows calls to a DLL.
1.5 Device Layout and I/O Array All dimensions are in mm NOTE: 98.4 100.36 59.05 169.55 Figure 1-2: PCIe-9814 Schematic The PCIe-9814 I/O array is labeled to indicate connectivity, as shown.
PCIe-9814 Figure 1-3: PCIe-9814 I/O Array All I/O connectors are SMB Snap-on type.
Input Faceplate Label Analog CH0 Analog CH1 Analog CH2 Analog CH3 Ext. Clock CLK Input for external sample clock to digitizer Ext. Digital Trigger TRG External digital trigger input, receiving trigger signal from external instrument and initiating acquisition Synced Digital SDI0 Synced Digital SDI1 Synced Digital SDI2 Remark Analog Input Channel 3 SDI bits (bit 0:2) and ADC data are combined into one register and transferred to host PC by DMA.
PCIe-9814 2 Getting Started This chapter describes proper installation environment, installation procedures, package contents and basic information users should be aware of regarding the PCIe-9814. Diagrams and illustrated equipment are for reference only. Actual system configuration and specifications may vary. NOTE: 2.1 Installation Environment When unpacking and preparing to install, please refer to Important Safety Instructions.
Inspect the carton and packaging for damage. Shipping and handling could cause damage to the equipment inside. Make sure that the equipment and its associated components have no damage before installation. CAUTION: The equipment must be protected from static discharge and physical shock. Never remove any of the socketed parts except at a static-free workstation. Use the anti-static bag shipped with the product to handle the equipment and wear a grounded wrist strap when servicing.
PCIe-9814 3 Operations This chapter contains information regarding analog input, triggering and timing for the PCIe-9814. 3.1 Functional Block Diagram SSI CH0 CH1 Analog Front-End 12 Bit ADC CH3 PCIe Interface CH2 FPGA Calibration CLK IN Clock Distribution TRG IN SDI0 Buffer SDI1 4 SDI2 3.2 Analog Input Channel 3.2.
not only accurate DC performance but also high signal-to-noise ratio, and high spurious-free dynamic range in AC performance. The ADC transfers data to system memory via the high speed PCI Express Gen 1 X 4 interface. For auto-calibration, internal calibration provides stable and accurate reference voltage to the AI. 3.2.2 Input Range and Data Format Data format of the PCIe-9814 is 2’s complement. The ADC data of PCIe-9814 is on the 12 MSB of the 16-bit A/D data.
PCIe-9814 Description Midscale +1LSB Midscale Midscale -1LSB 4.88mV 0V -4.88mV 2.44mV 0V -2.44mV 0.488mV 0V -0.488mV 0.244mV 0V -0.244mV Digital Code 0001 0000 FFF0 Comment SDI bit is assumed to be 0 Bipolar Analog Input Table 3-3: Input Range Midscale Values 3.2.3 DMA Data Transfer The PCIe-9814, a PCIe Gen 1 X 4 device, is equipped with a 200MS/s high sampling rate ADC, generating a 640 MByte/ second rate.
being limited by memory limitations. In non-scatter-gather mode, the maximum DMA data transfer size is 2 MB double words (8 MB bytes); in scatter-gather mode, there is no limitation on DMA data transfer size except the physical storage capacity of the system. Users can also link descriptor nodes circularly to achieve a multibuffered DMA. Figure 3-2 illustrates a linked list comprising three DMA descriptors.
PCIe-9814 D Flip Flop Q SDI0 D CLK D Flip Flop Q SDI1 D CLK D Flip Flop Q SDI2 D CLK Bit 15 Bit 3 Bit 2 Bit 1 Bit 0 X SDI2 SDI1 SDI0 ADC Data Timebase CLK Data Analog Input AFE ADC Figure 3-3: Synchronous Digital Input Operations 3.3 Trigger Source and Trigger Modes This section details PCIe-9814 triggering operations.
source. The PCIe-9814 supports internal software trigger, external digital trigger, and analog trigger. 3.3.1 Software Trigger The software trigger, generated by software command, is asserted immediately following execution of specified function calls to begin the operation. 3.3.2 External Digital Trigger An external digital trigger is generated when a TTL rising edge or falling edge is detected at the SMB connector TRG IN on the front panel. As shown, trigger polarity can be selected by software.
PCIe-9814 3.4 Trigger Modes Trigger modes applied to trigger sources initiate different data acquisition timings when a trigger event occurs. The following trigger mode descriptions are applied to analog input function. 3.4.1 Post Trigger Mode Post-trigger acquisition is applicable when data is to be collected after the trigger event, as shown. When the operation starts, PCIe9814 waits for a trigger event. Once the trigger signal is received, acquisition begins.
Figure 3-7: Delayed Trigger Mode Acquisition 3.4.3 Pre-Trigger Mode Collects data before the trigger event, starting once specified function calls are executed to begin the pre-trigger operation, and stopping when the trigger event occurs. If the trigger event occurs after the specified amount of data has been acquired, the system stores only data preceding the trigger event by a specified amount, as follows.
PCIe-9814 Operation start Acquisition start Acquisition stop Data transfer to system begins Trigger event occurs Time Trigger Data M samples N samples Figure 3-9: Middle Trigger Mode Acquisition 3.4.5 Acquisition with Re-Triggering A digitizer acquires a trace of N samples/channel for a single acquisition. Re-Trigger mode can also be set to automatically acquire R traces, containing N*R samples/channel of data, without additional software intervention.
3.5 Timebase CLK IN To ADC 80M Xtal Synthesizer Board SDI0 Figure 3-11: PCIe-9814 Clock Architecture 3.5.1 Internal Sampling Clock The PCIe-9814 internal 80MHz crystal oscillator acts as a sampling clock for ADC. 3.5.2 External Reference Clock (PCIe-9814P only) The PCIe-9814P's onboard PLL module allows SDI0 to act as an external reference clock. Synthesizer input switches to the clock source at SMB connector SDI0, generating precisely 80MHz clock for ADC. 3.5.
PCIe-9814 For more information, refer to the WD-DASK Function Library Reference. 3.6 ADC Timing Control 3.6.1 Onboard 80MHz Oscillator Timebase Architecture ADC ADC Output 80MHz X6 Multiplier PLL 480MHz 80MHz For ADC Data Bus For ADC State machine FPGA Figure 3-12: PCIe-9814 Timebase Architecture 3.6.2 Basic Acquisition Timing The PCIe-9814 commences acquisition upon receipt of a trigger event originating with software command, external digital trigger.
Analog signal TIMEBASE Trigger Acquisition In Progress DATA Acquisition initiates following this clock edge D1 D2 D3 D4 D253 D254 D255 D256 Trigger mode = post-trigger, DataCnt = 256, ScanIntrv = 1 Figure 3-13: Basic Digitizer Acquisition Timing To achieve sampling rates other than 80MS/s, a number for scan interval counter needs only be specified. For example, if the scan interval counter is set as 2, the equivalent sampling rate is 80MS/s / 2 = 40MS/s.
PCIe-9814 Counter Name ScanIntrv DataCnt Length Valid Value Description 16-bit 1-65535 Timebase divider to achieve equivalent sampling rate of the digitizer, where Sampling rate = Timebase / ScanIntrv 31-bit Specifies the amount of data to be acquired: 1-2147483647 1 - 2147483648 for pre-trig or mid-trig mode operation Indicates time between a trigger event and commencement of acquisition. The unit of a delay count is the period of the Timebase.
SSI Timing Signal Function SSI Trig Input/output trigger signal through SSI All SSI signals are routed to the 16-pin connector from FPGA, enabling multi-module synchronization. ACL-eSSI-2/ ACLeSSI-3/ACL-eSSI-4 cables can be used to synchronize 2, 3, or 4 modules. Signal Direction Descr.
DIP ON 1 2 3 4 PCIe-9814 Figure 3-15: Card Number Configuration Switch When all sliders are in ON position, card number is 15, when all are OFF, card number is 0, as shown.
Slider 1 Slider 2 Slider 3 Slider 4 Card # ON OFF OFF ON 9 ON OFF ON OFF 10 ON OFF ON ON 11 ON ON OFF OFF 12 ON ON OFF ON 13 ON ON ON OFF 14 ON ON ON ON 15 Table 3-6: Card Number Configuration Settings Default card number is 15. 3.7.2 SSI_TRIG As an output, the SSI_TRIG signal reflects the trigger event signal in an acquisition sequence. As an input, the PCIe-9814 accepts the SSI_TRIG signal to be the trigger event source.
PCIe-9814 3.9 Multi-boot The PCIe-9814 supports software-based firmware updates. If firmware updates fail, the system may be unable to recognize the module, in which case the following steps may solve the problem. 1. Config SW2 to "on" 2. Install the module and restart the system 3. If the module is recognized, update firmware again (ensure the firmware you updated is workable) 4. Turn off the system, config SW2 to "off" and restart the system. The default state of SW2 is "off".
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PCIe-9814 Appendix A Calibration This chapter introduces the calibration process to minimize analog input measurement errors. A.1 Calibration Constant The PCIe-9814 is factory calibrated before shipment, with associated calibration constants written to the onboard EEPROM. At system boot, the PCIe-9814 driver loads these calibration constants, such that analog input path errors are minimized. ADLINK provides a software API for calibrating the PCIe-9814.
Before initializing auto-calibration, it is recommended to warm up the PCIe-9814 for at least 20 minutes and remove connected cables. NOTE: 32 It is not necessary to manually factor delay into applications, as the PCIe-9814 driver automatically adds the compensation time.
PCIe-9814 Important Safety Instructions For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment. X X X X X Read these safety instructions carefully. Keep this user’s manual for future reference. Read the specifications section of this manual for detailed information on the operating environment of this equipment.
X X Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. A Lithium-type battery may be provided for uninterrupted, backup or emergency power. Risk of explosion if battery is replaced with an incorrect type; please dispose of used batteries appropriately.
PCIe-9814 Getting Service Contact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan ᄅؑקխࡉ৬ԫሁ 166 ᇆ 9 ᑔ Tel: +886-2-8226-5877 Fax: +886-2-8226-5717 Email: service@adlinktech.com Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110 San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co.
ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33 (0) 1 60 12 35 66 Fax: +33 (0) 1 60 12 35 66 Email: france@adlinktech.com ADLINK Technology Japan Corporation Address: 〒101-0045 東京都千代田区神田鍛冶町 3-7-4 神田 374 ビル 4F KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku, Tokyo 101-0045, Japan Tel: +81-3-4455-3722 Fax: +81-3-5209-6013 Email: japan@adlinktech.com ADLINK Technology, Inc.
