USB-1210 4-CH 16-Bit 2MS/s Simultaneous-Sampling USB DAQ Module User’s Manual Manual Rev.: 2.00 Revision Date: July 31, 2014 Part No: 50-1Z162-1000 Advance Technologies; Automate the World.
Revision History ii Revision Release Date 2.
USB-1210 Preface Copyright 2014 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
Conventions Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly. Additional information, aids, and tips that help users perform tasks. NOTE: CAUTION: WARNING: iv Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.
USB-1210 Table of Contents Revision History...................................................................... ii Preface .................................................................................... iii List of Figures ....................................................................... vii List of Tables.......................................................................... ix 1 Introduction ........................................................................ 1 1.1 Overview..........
2.5.1 Connecting the USB-1210 Module ........................... 18 2.5.2 Device ID .................................................................. 19 2.5.3 Hardware Configuration............................................ 20 3 Operation & Calibration.................................................... 21 3.1 3.2 Operation ........................................................................... 21 3.1.1 Signal Function ......................................................... 21 3.1.
USB-1210 List of Figures Figure 1-1: Figure 1-2: Figure 1-3: Figure 1-4: Figure 1-5: Figure 1-6: Figure 1-7: Figure 1-8: Figure 1-9: Figure 1-10: Figure 1-11: Figure 2-1: Figure 2-2: Figure 2-3: Figure 2-4: Figure 2-5: Figure 2-6: Figure 2-7: Figure 3-1: Figure 3-2: Figure 3-3: Figure 3-4: Figure 3-5: Figure 3-6: Figure 3-7: Figure 3-8: Figure 3-9: Figure 3-10: Figure 3-11: Figure 3-12: Figure 3-13: Figure 3-14: Figure 3-15: Figure 3-16: Figure 3-17: Figure 3-18: Figure 3-19: List of Figures USB-1210 Mod
Figure 3-20: Figure 3-21: Figure 3-22: Figure 3-23: Figure 3-24: Figure 3-25: viii Mode 7-Single-Triggered Continuous Pulse............. 37 Mode 8-Continuous Gated Pulse.............................. 37 Mode 9-Edge Separation Measurement................... 38 Mode 10-PWM Output Following Trigger ................. 38 Mode 10-PWM Output Following GATE Control ...... 38 Isolation ....................................................................
USB-1210 List of Tables Table Table Table Table Table 1-1: 1-2: 3-1: 3-2: 3-3: List of Tables USB-1210 Pin Assignment ............................................ 11 CN1/CN2 I/O Signal Description.................................... 12 Bipolar Analog Input Range and Output Digital Code ... 23 Pin Definition of LVTTL Digital I/O ................................. 31 Timer/Counter Pin Definition..........................................
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USB-1210 1 Introduction 1.1 Overview The USB-1210 is a 16-bit high-speed USB 2.0-based DAQ module equipped with 4 analog input channels providing simultaneous sampling at up to 2MS/s per channel. The USB-1210 delivers high accuracy and excellent dynamic performance at maximum sampling rates and features flexible trigger function. In addition, onboard 256MS FIFO ensures no data loss during acquisition even with heavy loading on CPU or system.
1.4 Specifications 1.4.1 General Specifications Digital I/O Specifications Number of channels 8-CH programmable function digital input (DI) 4-CH programmable function digital output (DO) Compatibility LVTTL (single-end) (supports 3.3V and 5 V DI but 3.3V DO) Input voltage Logic low: VIL = 0.8 V max; IIL = 0.2 mA max.Logic high: VIH = 2.0 V min.; IIH = 0.2 mA max. Output voltage Logic low: VOL = 0.5 V max; IOL = 10 mA max. Logic high: VOH = 2.6V min.; IIH = 10 mA max.
USB-1210 1.4.2 Analog Input Resolution 16 bit Channels 4 differential (simultaneous sampling) Maximum sampling rate 2MS/s per channel Programmable gain 1, 5 Input range (voltage) ± 10 V, ± 2 V Offset error ± 1mV (gain=1) ± 0.2mV (gain=5) Gain error Typical: ± 0.01% of FSR (gain=1 & 5) Maximum: ± 0.
Programmed I/O, continuous (USB bulk transfer mode) Data transfer 1.5 Schematics All units are in millimeters (mm) NOTE: 1.5.
USB-1210 156.
114 41.
USB-1210 1.5.2 Module Stand The multi-function USB-1210 stand is compatible with desk, rail, or wall mounting. To fix the module in the stand, slide the module body into the stand until a click is heard. To remove the module from the stand, twist the bottom of the stand in a back-and forth motion and separate from the module.
200.1 169.4 156.5 Figure 1-5: Module, Stand, & Wall Mount Kit Side View (w/ connections) 114.
USB-1210 26 B 20.4 20.
5.89 1.5 3.
USB-1210 1.6 Connector Pin Assignment The USB-1210 module is equipped with 40-pin removable screw-down terminal connectors, with pin assignment as shown.
Signal Reference I/O Description CGND N/A None Chassis ground GPI<0..7> IGND I Function Input <0..7> (see Section 3.1.5: Programmable Function I/O) GPO<0..3> IGND O Function Output <0..3> (see Section 3.1.5: Programmable Function I/O) CONV IGND I External A/D conversion clock AITG IGND I Digital trigger for analog input NC NC NC No connection Table 1-2: CN1/CN2 I/O Signal Description 1.
USB-1210 devices that plug into the existing power systems are ground-referenced signal sources. Input Configurations Differential Input Mode Differential input mode provides positive signal and negative signal inputs that respond to signal voltage difference between them, as shown. If the signal source is ground-referenced, differential mode can be used for noise rejection for improvement over single-ended mode. Input multiplexer x = 0, ...
1.8 Software Support ADLINK provides comprehensive software drivers and packages to suit various user approaches to system building. In addition to programming libraries, such as DLLs, for most Windows-based systems, ADLINK also provides drivers for other application environments such as LabVIEW® and MATLAB®. All software options are included in the ADLINK All-in-One CD. Be sure to install the driver & utility before using the USB-1210 module. 1.
USB-1210 2 Getting Started 2.1 Unpacking Checklist Before unpacking, check the shipping carton for any damage. If the shipping carton and/or contents are damaged, inform your dealer immediately. Retain the shipping carton and packing materials for inspection. Obtain authorization from your dealer before returning any product to ADLINK. Ensure that the following items are included in the package.
2.3 Rail Mounting The multi-function stand can be mounted on the DIN rail using the rail-mount kit as shown.
USB-1210 Figure 2-3: Module Rail-Mounted 2.4 Wall Mounting The multi-function stand can be fixed to a wall using four flush head screws as shown. The four screw holes should be approximately 3.4 mm in diameter. 20.4 13.
Figure 2-5: Module with Wall Mount Apparatus 2.5 Installing the USB-1210 Module WARNING: 2.5.1 The appropriate driver must be installed before you can connect the USB DAQ to your computer system. Refer to Section 1.9: Driver Support for Windows for driver support information. Connecting the USB-1210 Module 1. Turn on your computer. 2. Connect the USB-1210 module to one USB 2.0 port on your computer using the included USB cable. 3.
USB-1210 Figure 2-6: USB-1210 module in Windows Device Manager If the USB-1210 module cannot be detected, the power provided by the USB port may be insufficient. The USB-1210 module is exclusively powered by the USB port and requires 460 mA @ 5 V. 2.5.2 Device ID A rotary control on the rear of the module (as shown) controls device ID setting and can be set from 1 to 8. The device ID allows dedicated control of the USB-1210 module irrespective of the connected USB port.
type is connected, each must be set to a different ID to avoid conflicts and errors in operation. Figure 2-7: Device ID Selection Control 2.5.3 Hardware Configuration All remaining hardware configurations are software programmable, including sampling/update rate, input/output channel, input range, and others. Please see the UD-DASK Function Reference manual for details.
USB-1210 3 Operation & Calibration Operation of the USB-1210 is described here to assist in configuration and programming of the module. Functions described include A/D conversion, programmable function I/O, and others 3.1 Operation 3.1.1 Signal Function The USB-1210 provides 4 truly differential and simultaneous-sampling analog input channels of 16-bit A/D input. Each A/D input channel is connected to one ADC (LT LTC2380 or equivalent).
Signal Protection AI CH0- DC path/ Calibration Source SW PGA 2nd-order LPF 1st CH SDO_CH0 BUSY_CH0 AI CH1- AI CH2+ AI CH2- SDO_CH1 IO Connector AI CH1+ BUSY_CH1 Four channels ADC Calibration Mux and Reference Src SDO_CH2 BUSY_CH2 SDO_CH3 BUSY_CH3 SCK AI CH3+ AI CH3- Signal Protection DC path/ Calibration Source SW DI CH[7..0] DO CH[3..
USB-1210 Analog Input Circuitry Clock SW 2 MHz 2nd order LPF With level shift x1/2 PGA With x1 or x4 PGA ADC MUX AI CHx_N Signal Input Signal Protection AI CHx_P Signal Input Path Selection MUX ADCONV_CHn ADCONV_CH0 Path_DC Calibration SRC CLK Buffer MUX REF IC x1 Buffer x2 Figure 3-3: Analog Input AI Data Format The acquired 16-bit A/D data is 2’s complement coded data format. Valid input ranges and ideal transfer characteristics are shown.
Software Conversion with Polling Data Transfer Acquisition Mode (Software Polling) Generally the most convenient way to acquire a single A/D data sample, the A/D converter starts a conversion when the dedicated software command is executed. The software then polls the conversion status and reads back the A/D data when it is available. This method is indicated when there is a need to process A/D data in real time or instant closed-loop control.
USB-1210 Trigger TIMEBASE ScanIntrv = 1 D1 ScanIntrv = 2 D1 ScanIntrv = 3 D1 D2 D3 D4 D2 D5 D3 D6 D7 D4 D8 D9 D10 D5 D6 DATA Acquisition In Progress D2 D3 D4 Acquisition begins following this clock edge Figure 3-4: Configuring Different Sampling Rates Sampling Rate Control with External Conversion Strobe Clock The A/D conversion clock can be provided by external strobe clock via CONV pin.
trigger occurs when the analog trigger signal crosses above (above high) or below (below low) the pre-defined voltage level. The range of trigger level is the full-scale range of the selected input channel and the resolution is 16-bit. Below-Low Analog Triggering In below-low analog triggering, as shown, the trigger signal is generated when the input analog signal is less than the Low_Threshold voltage. High_Threshold setting is not used in this triggering situation.
USB-1210 Figure 3-6: Above-High Analog Triggering External Digital Triggering An external digital trigger occurs when a rising or falling edge is detected on the digital signal connected to the AITG (analog input trigger) pin. Trigger polarity can be programmed using ADLINK software drivers. Signal level of the external digital trigger signals should be LVTTL-compatible, with a minimum pulse of 20ns.
Post-Trigger Acquisition Mode (no retriggering) Post-trigger acquisition is indicated when data is to be collected after the trigger event, as shown..
USB-1210 ƔOperation initiates ƔAcquisition initiates ƔAcquisition stops ƔData transfer to system begins ƔTrigger event occurs Time Trigger Data M samples N samples Figure 3-10: Middle Trigger Pre-Trigger Mode Pre-trigger acquisition is indicated when data is to be collected before the trigger event. Acquisition commences once specified function calls are executed to begin the pre-trigger operation, and stops when the trigger event occurs.
acquired after the first trigger signal, after which the USB-1210 awaits the next re-trigger signal (re-trigger signals occurring before the N samples are completed will be ignored). When the re-trigger signal occurs, another N samples are performed. The process repeats until the specified number of re-trigger signals are detected.
USB-1210 3.1.5 Programmable Function I/O The USB-1210 supports powerful programmable I/O function provided by an FPGA chip, configurable as LVTTL DI/DO, 32-bit timer/counters, and PWM output. These signals are single-ended and 5 V LVTTL-compliant. LVTTL DI/DO Programmable function I/O can be used as static LVTTL-compliant 8-CH digital input and 4-CH digital output. You can read/write these I/O lines by software polling, with sample and update rate fully controlled by software timing.
X Programmable gate selection (hardware or software control) X Programmable input and output signal polarities (high active or low active) X Initial Count loaded from a software application X Current count value readable by software without affecting circuit operation.
USB-1210 All input/output signal polarities can be programmed by software application. For brevity, all GPTC_CLK, GPTC_GATE, and GPTC_OUT in the following illustrations are assumed to be active high or rising-edge triggered. 3.1.7 General Purpose Timer/Counter Modes Ten programmable timer/counter modes are available. All modes initialize following a software-start signal set by the software. The GPTC software reset initializes the status of the counter and reloads the initial value to the counter.
of GPTC_GATE. After the completion of the period interval on GPTC_GATE, GPTC_OUT outputs high and then current count value can be read by the software application. Operation in which initial count = 0, count-up mode is shown. Software start Gate CLK Count value 0 0 1 2 3 4 5 5 5 Figure 3-15: Mode 2-Single Period Measurement Mode 3: Single Pulse-Width Measurement The counter calculates the pulse-width of the signal on GPTC_GATE in terms of GPTC_CLK.
USB-1210 Figure 3-16: Mode 3-Single Pulse-Width Measurement Mode 4: Single-Gated Pulse Generation This mode generates a single pulse with programmable delay and programmable pulse-width following software start. The two programmable parameters can be specified in terms of periods of the GPTC_CLK input by the software application. GPTC_GATE enables/disables calculation. When GPTC_GATE is inactive, the counter halts the current count value.
Software start Gate CLK 2 Count value 2 1 0 3 2 1 0 OUT Figure 3-18: Mode 5-Single-Triggered Pulse Mode 6: Re-Triggered Single Pulse Generation This mode is similar to Mode 5 except that the counter generates a pulse following every active edge of GPTC_GATE. After software start, every active GPTC_GATE edge triggers a single pulse with programmable delay and pulse width. Any GPTC_GATE triggers that occur when the prior pulse is not completed are ignored.
USB-1210 Software start Gate CLK Count value 4 4 4 3 2 1 0 2 1 0 3 2 1 0 2 1 0 3 2 OUT Figure 3-20: Mode 7-Single-Triggered Continuous Pulse Mode 8: Continuous Gated Pulse Generation This mode generates periodic pulses with programmable pulse interval and pulse-width following software start. GPTC_GATE enables/disables calculation. When GPTC_GATE is inactive, the counter halts the current count value.
imum counting width is 32-bit. Decrease of the counter value in Edge Separation Measurement mode is shown. Software start Gate AUX CLK C ou nt v a lu e 13 13 12 11 10 9 8 7 6 5 4 3 2 1 1 1 1 1 1 Figure 3-22: Mode 9-Edge Separation Measurement Mode 10: PWM Output The USB-1210 timer/counter can also simulate a PWM (Pulse Width Modulation) output. The PWM starts to generate output following a GPTC_GATE edge trigger or being activated/inactivated by the GPTC_GATE high/low logic control.
USB-1210 FPWM = FTim ebase Pulse_ initial _ cnt + Pulse_ length_ cnt DutyPWM = 3.1.8 Pulse_ length_ cnt Pulse_ initial _ cnt + Pulse_ length_ cnt Isolation The USB-1210 provides 500VDC isolation capability to protect against hazardous voltage caused by erroneous signal connection or signal levels to be measured exceeding expectation. The isolation circuit can also reduce the ground-loop noise.
FPGA. Loading calibration constants entails loading the values of TrimDACs firmware stored in the onboard EEPROM. Dedicated space for storing calibration constants is provided in the EEPROM. In addition to the bank of factory calibration constants, there is one user-utilization bank, allowing loading of the TrimDACs firmware values either from the original factory calibration or a subsequently-performed calibration.
USB-1210 Important Safety Instructions For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment. X Read these safety instructions carefully. X Keep this user’s manual for future reference. X Read the specifications section of this manual for detailed information on the operating environment of this equipment.
X Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. A Lithium-type battery may be provided for uninterrupted, backup or emergency power. Risk of explosion if battery is replaced with an incorrect type; please dispose of used batteries appropriately.
USB-1210 Getting Service Contact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan ᄅؑקխࡉ৬ԫሁ 166 ᇆ 9 ᑔ Tel: +886-2-8226-5877 Fax: +886-2-8226-5717 Email: service@adlinktech.com Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110 San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co.
ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33 (0) 1 60 12 35 66 Fax: +33 (0) 1 60 12 35 66 Email: france@adlinktech.com ADLINK Technology Japan Corporation Address: ͱ101-0045 ᵅҀ䛑गҷ⬄ऎ⼲⬄䤯 ⬎ފ3-7-4 ⼲⬄ 374 ɛɳ 4F KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku, Tokyo 101-0045, Japan Tel: +81-3-4455-3722 Fax: +81-3-5209-6013 Email: japan@adlinktech.com ADLINK Technology, Inc.
