User guide

There are 32 time slots on an E1 interface. Time slot 0 is always reserved for framing and

cannot be used to configure a fractional E1 interface.

Time slot numbering constraints vary for different E1 PICs, as follows:

•

For 4-port E1 PICs, the configurable time slot range is 1 through 31 (time slot 0 is reserved

for framing).

•

For 10-port Channelized E1 and 10-port Channelized E1 Intelligent Queuing (IQ) PICs,

the configurable time slot range is 2 through 32 (time slots 0 and 1 are reserved for

framing).

•

For Enhanced Intelligent Queuing (IQE) PICs, the configurable time slot range is 2

through 32.

•

NxDS0 time slots configured on either a channelized STM1 IQ interface or a channelized

E1IQ interface are numbered from 1 to 31 (0 is reserved), while fractional E1 time slots

are numbered from 2 to 32 (0 and 1 are reserved).

•

For fractional E1 interfaces only, if you connect a 4-port E1 PIC to a device that uses

time slot numbering from 2 through 32, you must subtract 1 from the configured number

of time slots. To do this, include the timeslots statement at the [edit interfaces

interface-name e1-options] hierarchy level, and offset 1 from the specified slot number.

NOTE: When configuring fractional E1 time slots, you also must include the

framing g704 statement at the [edit interfaces e1-fpc/pic/port e1-options]

hierarchy level.

To configure ranges, use hyphens. To configure discontinuous time slots, use commas.

Do not include spaces.

Example: Configuring Fractional E1 Time Slots

In this example, time slots are offset by 1 to compensate for the fractional E1 interface

being connected to a device that uses time slot numbering from 0 through 31.

Use Time Slots

4 Through 6, 11, and 25

[edit interfaces interface-name e1-options] # Fractional E1 interface

timeslots 4-6,11,25;

Use Time Slots

1 Through 10

[edit interfaces interface-name e1-options]

timeslots 1-10;

Use Time Slots

1 Through 5, 10, and 24

[edit interfaces interface-name e1-options]

timeslots 1-5,10,24;

Documentation

• timeslots on page 52

Chapter 2: E1 Interfaces