Wi.232DTS User’s Manual U.S 902-928MHz ISM Band Version Rev 1.4.1 Embedding the wireless future..
1. Document Control Created By Engineering Review Marketing Review Approved - Engineering Approved - Marketing Steve Montgomery Revision 1.0 1.2 1.3 Author SJM TRM / GWH TRM Date 12/9/2003 5/12/2004 6/2/2004 1.3.1 TRM 6/3/2004 1.4.0 TRM 6/27/2004 1.4.1 TRM 3/15/2005 12/9/03 Description Document Created Various corrections including register addresses Corrected programming omission regarding esc chars Corrected MAC/OUI and NVSLPMODE register errors Corrected inconsistencies in register tables.
2. Introduction Module Overview TRANSMITTER BASEBAND DSP ANTENNA SWITCH COMBINER UART CONTROL ANTENNA VCO PROTOCOL CONTROLLER 2.1. ANALOG IN DIGITAL I/O DATA RECEIVER LEGEND HARDWARE IN WISE Wi.232 APPLICATION SOFTWARE IN WISE WiSE MAC SERIAL INTERFACE WiSE PACKET I/O INTERFACE HAL Figure 1: Wi.232DTS Block Diagram 2.2. • • • • • • • • • • True UART to antenna solution 16-bit CRC error checking 152.
3. Table of Contents 1. 2. Document Control ...............................................................................................................2 Introduction..........................................................................................................................2 2.1. Module Overview .............................................................................................................. 2 2.2. Features ......................................................................
4. Table of Figures Figure 1: Wi.232DTS Block Diagram............................................................................................... 2 Figure 2: WiSE Block Diagram ........................................................................................................ 5 Figure 3: Wi.232DTS Networking Concept ..................................................................................... 6 Figure 4: RX State Machine .......................................................................
. Theory of Operation 6.1. General The Wi.232 module is one of a family of WiSE™ (Wireless Serial Engine) modules. A WiSE™ module combines a state-of-the-art DTS/FSK data transceiver and a high-performance protocol controller to create a complete embedded wireless communications link in a tiny IC-style package. Figure 2: WiSE Block Diagram The Wi.
Figure 3: Wi.232DTS Networking Concept The module is designed to interface directly to a host UART. Three signals are used to transfer data between the module and the host UART: TXD, RXD, and CTS. TXD is the data output from the module RXD is the data input to the module. CTS is an output that indicates the status of the module’s data interface. If CTS is low, the module is ready to accept data. If CTS is high, the module is busy and the host UART should not send any further data.
checking. Data is encoded using a proprietary algorithm (DirectSPREAD™) to spread the RF energy equally within the transmission bandwidth. Modules can operate in groups. Each module can be assigned an 8-bit group ID, which is used to logically link it to other modules on the same channel. All modules on a channel will interoperate, regardless of their respective group Ids. In other words, the CSMA mechanism will prevent collisions of modules on the same channel but belonging to different groups.
with batteries than cannot supply the pulse currents required for DTS mode. The range in this mode will be a little more than half of the range in DTS mode. The module can be placed into sleep mode through the command mode. In sleep mode, the RF section is completely shutdown, and the protocol processor is in an idle state.
RX HEADER RF U MT N= E L R UT TA O EO M DA TI TX X TR UAR IS R IDLE MODE DATALEN
7. Application Information 7.1. Pin-out Diagram Figure 7: Pin-out diagram 7.2. No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Pin Description Description Ground No connect – reserved No connect – reserved Command input – active low UART receive input UART transmit output UART clear to send output – active low No connect – reserved No connect – reserved Reserved – ISP pin Reserved – ISP pin Ground Antenna port – 50 ohm Ground Ground Ground Ground Ground VCC – 2.7 to 3.
7.3. Mechanical Drawings Figure 8: Module Mechanical Drawings Wi.232DTS Preliminary © 2003-2005 Radiotronix Inc.
Figure 9: Wi.232DTS Suggested Footprint Wi.232DTS Preliminary © 2003-2005 Radiotronix Inc.
7.4. Example Circuit Figure 10: Evaluation Module Circuit 7.5. Power Supply Although the Wi.232DTS module is very easy to use, care must be given to the design of the power supply circuit. It is important for the power supply to be free of digital noise generated by other parts of the application circuit, such as the RS-232 converter. Figure 4 shows the schematic for our evaluation module circuit for the Wi.232DTS module. It includes an on-board power supply and antenna connector.
Line Direction Description CTS Out Clear to send – this pin indicates to the host micro when it is ok to send data. When CTS is high, the host micro should stop sending data to the module until CTS returns to the low state. CMD In Command – the host micro will bring this pin low to put the module in command mode. Command mode is used to set and read the internal registers that control the operation of the module.
antenna is used. If the transmitter operates under the spread-spectrum rules, however, the transmit power can be increased; up to 1W depending on the spread-spectrum technique and antennas that are used. Wireless Fact: Frequency hopping spread spectrum does not effectively combat multipath in the 902-928 MHz band. It does combat in-channel interference, but at the expense of bandwidth, power consumption, and latency. Direct sequence spread spectrum, like FHSS, does not combat multipath.
When the module is in DTS mode, the channel registers are masked so that only the lower 6-bits determine the channel. The following equations can be used to calculate transmit center frequency in LP and DTS modes. Fc = 902.3 + chan * .3MHz( LP) Fc = 903.0 + chan * .75MHz( DTS ) All modules in a network must be in the same mode (LP or DTS) and must have the same transmit and receive channels programmed in order to communicate properly. 8.2.
LP Mode Parameters TX Power -3.5dBm Deviation +/-50kHz TX Current 24mA RX Current 20mA RX Bandwidth 200kHz Table 5, LP Mode Parameters 8.3. UART Data Rate regNVDATARATE (0x03) R/W R/W R/W RES RES RES 7 6 5 R/W RES 4 R/W RES 3 regDATARATE (0x4E) R/W R/W R/W BR2 BR1 BR0 2 1 0 By default, the UART data rate is set to 2.4 kbit/second at the factory. This data rate can be changed by setting the regDATARATE register.
8.5. R/W D7 7 Transmit Wait Timeout regNVTXTO (0x05) R/W R/W D6 D5 6 5 R/W D4 4 R/W D3 3 R/W D2 2 regTXTO (0x50) R/W R/W D1 D0 1 0 When a byte is received by the UART, the module will start a timer that will countdown every millisecond. The timer is restarted when each byte is received. If the timer reaches zero before the next byte is received from the UART, the module begin transmitting the data in the buffer.
8.9. Verbose mode regNVSHOWVER (0x0A) R/W R/W R/W B7 B6 B5 7 6 5 R/W B4 4 R/W B3 3 regSHOWVER (0x55) R/W R/W R/W B2 B1 B0 2 1 0 Setting this register to 0x00 will suppress the start-up message, including firmware version, that is sent to the UART when the module is reset. A value of 0x01 will cause the message to be displayed after reset. By default, the module start-up message will be displayed. 8.10.
8.13.
packets are received while the CMD line is active, they are still processed and presented to the module’s UART for transmission. Figure 11: Command and CMD Pin Timing 9.2. Command Formatting The Wi.232DTS module contains several volatile and non-volatile registers that control its configuration and operation. The volatile registers all have a non-volatile mirror register that is used to determine the default configuration when power is applied to the module.
Figure 12: Command Conversion Code 9.3. Writing To Registers Writing to a volatile register is nearly instantaneous. Writing to a non-volatile register, however, takes typically 16 ms. Because the packet size can vary based on the need for encoding, there are two possible packet structures. The following tables show the byte sequences for writing a register in each case. WARNING: Be sure that the module is properly powered and remains powered for the duration of the register write.
10. Electrical Specifications 10.1. Absolute Maximum Ratings Parameter VCC – Power Supply Voltage on any pin Input RF Level Storage Temperature Min Max Units -0.3 -0.3 5.0 5.2 15 85 VDC VDC dBm °C -40 Table 12, Absolute Maximum Ratings 10.2. Detailed Electrical Specifications 10.2.1. AC Specifications – RX Parameter Receive frequency - US Min Typ 902.2 Max Units Notes 927.
10.2.2. AC Specifications – TX Parameter Min Transmit Frequency –US 902.2 Typ Max Units 927.
10.3. Flash Specifications (Non-Volatile Registers) Parameter Flash Write Duration Min Typ. 16 Flash Write Cycles 20k 100k Max 21 Units ms Notes Module stalled during write operation Cycles Table 16, Flash Specifications (Non-Volatile Registers) Wi.232DTS Preliminary © 2003-2005 Radiotronix Inc.
11. Custom Applications For cost-sensitive applications, such as wireless sensors and AMR, Radiotronix can embed the application software directly into the microcontroller built into the module. For more information on this service, please contact Radiotronix. 12. Ordering Information Wi.232DTS modules can be ordered on-line 24/7 from Mouser Electronics at www.mouser.com/radiotronix or Future Electronics at www.futureelectronics.com (p/n: WI.232DTS). 13. Contact Us 13.1.
