User manual
Table Of Contents
- Chapter 1 Overview
- Chapter 2 Hardware Functionality
- 2.1 Introduction of ARK-3380 External I/O Connectors
- 2.2 ARK-3380 front metal face plate external I/O connectors
- 2.3 ARK-3380 rear metal face plate external I/O connectors
- Chapter 3 Hardware Installation and Upgrade
- 3.1 Jumpers and Connectors
- 3.2 Setting jumpers
- 3.3 COM2 RS-232/422/485 Jumper setting (J3/J4/J5)
- 3.4 LCD Power Jumper Setting (J6)
- 3.5 NTSC/PAL TV type Setting (J1)
- 3.6 Installing the DDR SDRAM Memory Module
- 3.7 Inserting a Compact Flash Card
- 3.8 Installing the 2.5" Hard Disk Drive (HDD)
- 3.9 Connecting Power
- Chapter 4 Award BIOS Setup
- 4.1 Introduction
- 4.2 Entering Setup
- 4.2.1 Main Menu
- 4.2.2 Standard CMOS Features
- 4.2.3 Advanced BIOS Features
- 4.2.4 Advanced Chipset Features
- 4.2.5 Integrated Peripherals
- 4.2.6 Power Management Setup
- 4.2.7 PnP/PCI Configurations
- 4.2.8 Frequency/Voltage Control
- 4.2.9 Load Optimized Defaults
- 4.2.10 Set Password
- 4.2.11 Save & Exit Setup
- 4.2.12 Quit Without Saving
- Chapter 5 PCI SVGA/LCD Setup
- Chapter 6 Full Disassembly Procedure
ARK-3380 User Manual 38
4.2.4 Advanced Chipset Features
Note: The “Advanced Chipset Features” options control the configura-
tion of the board’s chipset. This page is developed for the particular
chipset, to control chipset register settings, and fine tune system perfor-
mance. It is strongly recommended that only technical users make
changes to the default settings.
• DRAM Timing Selectable [By SPD]
This option refers to the method by which the DRAM timing is
selected.
The default is “By SPD”.
Manual This item provides DRAM clock/drive for The user selec-
tion.
By SPD This item provides DRAM clock/drive for SPD (Serial Pres-
ence Detect).
• MGM Core Frequency [Auto Max 266 MHz]
This field sets the frequency of the DRAM memory installed. The
default setting is Auto Max 266MHz.
• System BIOS Cacheable [Enabled]
This item allows the system BIOS to be cached to allow faster execu-
tion and better performance.
• Video BIOS Cacheable [Disabled]
This item allows the video BIOS to be cached to allow faster execution
and better performance.
• Memory Hole [Disabled]
This item reserves 15 MB-16 MB memory address space to ISA expan-
sion cards that specifically require the setting. When enabled, memory
from 15 MB-16 MB will be unavailable to the system because only the
expansion cards can access memory in this area.
• Delayed Transaction [Enabled]
The chipset has an embedded 32-bit posted write buffer to support
delay transaction cycles. Select Enabled to support compliance with
PCI specification version 2.1.