User manual

xiii Table of Contents
Figure 4.1:Award BIOS Setup initial screen ............... 29
4.3 Standard CMOS Setup .................................................... 29
Figure 4.2:Standard CMOS features screen ................ 29
4.4 Advanced BIOS Features................................................ 30
Figure 4.3:Advanced BIOS features screen ................. 30
4.4.1 CPU Feature ................................................................. 30
4.4.2 Virus Warning .............................................................. 30
4.4.3 CPU L1 & L2 Cache .................................................... 30
4.4.4 Quick Power On Self Test ........................................... 30
4.4.5 First/Second/Third/ Boot Other Device ....................... 30
4.4.6 Swap Floppy Drive ...................................................... 31
4.4.7 Boot UP Floppy Seek .................................................. 31
4.4.8 Boot Up NumLock Status ............................................ 31
4.4.9 Gate A20 Option .......................................................... 31
4.4.10 Typematic Rate Setting ................................................ 31
4.4.11 Typematic Rate (Chars/Sec) ........................................ 31
4.4.12 Typematic Delay (msec) .............................................. 31
4.4.13 Security Option ............................................................ 31
4.4.14 APIC Mode .................................................................. 31
4.4.15 MPS Version Control For OS ...................................... 31
4.4.16 OS Select for DRAM > 64MB .................................... 32
4.4.17 Report No FDD For WIN 95 ....................................... 32
4.4.18 Small Logo (EPA) Show ............................................. 32
4.5 Advanced Chipset Features............................................. 32
Figure 4.4:Advanced Chipset features screen .............. 32
4.5.1 DRAM Timing Selectable ........................................... 33
4.5.2 CAS Latency Time ...................................................... 33
4.5.3 Active to Precharge Delay ........................................... 33
4.5.4 DRAM RAS# to CAS# Delay ..................................... 33
4.5.5 DRAM RAS# Precharge .............................................. 33
4.5.6 DRAM Data Integrity Mode ........................................ 33
4.5.7 MGM Core Frequency ................................................. 33
4.5.8 System BIOS Cacheable .............................................. 33
4.5.9 Video BIOS Cacheable ................................................ 33
4.5.10 Memory Hole At 15M-16M ........................................ 34
4.5.11 Delayed Transaction .................................................... 34
4.5.12 Delay Prior to Thermal ................................................ 34
4.5.13 AGP Aperture Size (MB) ............................................ 34
4.5.14 On-Chip VGA .............................................................. 34
4.5.15 On-Chip Frame Buffer Size ......................................... 34
4.5.16 Boot Display ................................................................ 34
4.5.17 Panel Scaling ................................................................ 34
4.5.18 Panel Number .............................................................. 34
4.6 Integrated Peripherals...................................................... 35
Figure 4.5:Integrated Peripherals ................................. 35
4.6.1 IDE Cable Detect ......................................................... 35