User manual

Advantech SOM-Express Design Guide
60 Chapter 5 Carrier Board Design Guidelines
Table 5-16 LVDS Signals Trace Length Mismatch Mapping
Siganl group Data Pair
Signal
matching
Clocks
Associated
with the
channel
Clock
Matching
Data To
Associated
Clock
Matching
LVDS_A[0]+
LVDS_A[0]-
±10 mils
LVDS_A[1]+
LVDS_A[1]-
±10 mils
LVDS_A[2]+
LVDS_A[2]-
±10 mils
CHANNEL A
LVDS_A[3]+
LVDS_A[3]-
±10 mils
LVDS_A_CK+
LVDS_A_CK-
±10 mils
±10 mils
LVDS_B[0]+
LVDS_B[0]-
±10 mils
LVDS_B[1]+
LVDS_B[1]-
±10 mils
LVDS_B[2]+
LVDS_B[2]-
±10 mils
CHANNEL B
LVDS_B[3]+
LVDS_B[3]-
±10 mils
LVDS_B_CK+
LVDS_B_CK-
±10 mils
±10 mils
5.5.3 Layout Requirements
Routing for LVDS transmitter timing domain signals for different traces terminated
across 100# ± 15% and should be routed as follows.
! It is necessary to maintain the differential impedance, Zdiff = 100# ± 15%, where
all traces are closely routed in the same area on the same layer.
! Isolate all other signals from the LVDS signals to prevent coupling from other
sources onto the LVDS lines.
! The LVDS transmitter timing domain signals have maximum trace length of 10
inches. Be sure that the max trace length routed on the carrier board is 7.5 inches.
! Clocks must be matched to the associated data signals to within 10 mils.
! Channel-to-Channel clock length must be matched to within 10 mils.
! Minimum spacing between neighboring trace pair is 20 mils.
! Traces must be ground referenced.
! When choosing cables, it is important to remember that the differential
impedance of cable should be 100# and the length must be less than 16 inches.
SOM-Express
Receiver
Carrier board
Min=20mils
Max=7.5 inches
LVDS
connector
Figure 5-23 LVDS Signal Routing Topology