User manual

19 Chapter 3
Figure 3.2: Location of Jumpers and DIP switch on PCI-1240/PCI-1240U
ID0: the least significant bit (LSB) of Board ID
ID3: the most significant bit (MSB) of Board ID
Table 3.2: BoardID register
SW1 Board ID register
Base Add.+12h 3 2 1 0
Abbreviation BDID3 BDID2 BDID1 BDID
Table 3.3: BoardID setting
Board ID setting (SW1)
Board ID (Dec.) Switch Position
ID3 ID2 ID1 ID0
*0 ####
1 ###$
:
14 $$$$
15 $$$$
$= Off #= On * = default