User manual

PCI-1240/PCI-1240U User Manual 52

Table C.4: PCI-1240/PCI-1240U READ register format

Base Add.1514131211109876543210

Main Status Register: RR0

BPSC1 BPSC0ZONE2ZONE1ZONE0CNEXT I-DRV U-ERR Z-ERR Y-ERR

X-ERR U-DRV Z-DRV Y-DRV Z-DRV

Error Sta tus of Eac h Axis Driving S tatus of Ea c h Axis

Status Register 1: RR1

EMG ALARM LMT- LMT+ IN3 IN2 IN1 IN0 ADSNDACNSTAASND DSND CNST ASND CMP- CMP+

Stop Status

Status Register 2: RR2

EM G ALARM HLMT- HLMT+ SLMT- S LMT+

Status Register 3: RR3

D-END C-STA C-END

C+

P < C+ P < C-

P C-

PULSE

Input Register 1: RR4

Y-ALM Y-INP Y-EX- Y-EX+ Y- IN3 Y-IN2 Y-IN1 Y-IN0 X-ALM X-INP X-EX- X-EX+ X-IN3 X-IN2 X-IN1 X-IN0

Input Register 2: RR5

U- ALM U- IN P U-EX- U-EX+ U-IN3 U-IN2 U- IN 1 U- IN 0 Z- ALM Z- IN P Z- EX- Z- EX+ Z- IN 3 Z- IN 2 Z- IN 1 Z- IN 0

Data Reading Register 1: RR6

RD15 RD14 RD13 RD12 RD11 RD10 RD9 RD8 RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0

Data Reading Register 2: RR7

RD31 RD30 RD29 RD28 RD27 RD26 RD25 RD24 RD23 RD22 RD21 RD20 RD19 RD18 RD17 RD16

10 R

Interrupt Status Register: INTSTA

INTF

12 R

Board ID Register: BDID

BDID3 BDID2 BDID1 BDID0

14 R

Pulse Generator Status Register: PGSTA

PGMU3 PGMU2 PGMU1PGMU0 PGMZ3 PGMZ2 PGMZ1 PGMZ0 PGMY3 PGMY2 PGMY1PGMY0 PGMX3 PGMX2 PGMX1 PCMX0