User manual

17 PCI-1750 User Manual
Chapter 3 Operation
3.4.4 Interrupt Source Control
The “mode bits” written into the interrupt control register determine the allowable
sources of signals generating an interrupt. Bit 0 and bit 1 determine the interrupt
source for interrupt group 0, and bit 4 and bit 5 determine the interrupt source for
interrupt group 1, as indicated in Figure 3.4. Table 3.2 shows the relationship
between an interrupt source and the values in the mode bits.
Figure 3.4 Interrupt source control
3.4.5 Interrupt Triggering Edge Control
The interrupt can be triggered by a rising edge or a falling edge of the interrupt signal,
as determined by the value in the “triggering edge control” bit in the interrupt control
register, as shown in Table 3.3.
Table 3.2: Interrupt mode bit values
Interrupt Group 1 Interrupt Group 0
M11 M10 Description M01 M00 Description
0 0 Disable interrupt 0 0 Disable Interrupt
0 1 Source = IDI 8 0 1 Source = IDI 0
1 0 Source = IDI 8 & IDI 12 1 0 Source = IDI 0 & IDI 4
1 1 Source= Counter 2 1 1 Source = Timer 1
Table 3.3: Triggering edge control bit values
E0 or E1 Triggering edge of interrupt signal
1 Rising edge trigger
0 Falling edge trigger