User manual

PCI-1753/1753E User Manual 24
3.3.4 Interrupt Source Control
The “mode bits” in the interrupt control registers determine the allowable
sources of signals generating an interrupt. For the PCI-1753, bit 4 and bit
5 of Base+16 determines the interrupt source of port C0, bit 4 and bit 5 of
Base+17 determines the interrupt source for port C1, and so forth.
Because of sharing the same PCI controller with the PCI-1753, the
PCI-1753E’s interrupt sources are also controlled by the PCI-1753’s
interrupt control register. Bit 4 and bit 5 of Base+48 determines the
interrupt source of port C0 on the PCI-1753E, bit 4 and bit 5 of Base+49
determines the interrupt source of port C1, and so forth. Please refer the
table in Appendix A to find the corresponding address for the interrupt
source control of each port C.
The following table shows the relationship between an interrupt source
and the values in the mode bits.
Table 3.3: Interrupt mode bit values
Base+16/48 Port 0 Base+17/49 Port 1
M01 M00 Description M11 M10 Description
0 0 Disable interrupt 0 0 Disable interrupt
0 1 Source = PC00 0 1 Source = PC10
1 0 Source = PC00
and PC04
1 0 Source = PC10
and PC14
1 1 Disable interrupt 1 1 Disable interrupt
Base+18/50 Port 2 Base+19/51 Port 3
M21 M20 Description M31 M30 Description
0 0 Disable interrupt 0 0 Disable interrupt
0 1 Source = PC20 0 1 Source = PC30
1 0 Source = PC20
and PC24
1 0 Source = PC30
and PC34
1 1 Disable interrupt 1 1 Disable interrupt