User manual

v Table of Contents
Contents
Chapter 1 General Information ....................................... 2
1.1 Introduction ................................................................................. 2
1.2 Features........................................................................................ 4
1.3 Applications................................................................................. 4
1.4 Specifications............................................................................... 5
1.5 Pin Assignments .......................................................................... 6
1.6 Block Diagram............................................................................. 7
Figure 1.1: PCI-1753/1753E Block Diagram .......................... 7
Chapter 2 Installation ..................................................... 10
2.1 Initial Inspection........................................................................ 10
2.2 Unpacking.................................................................................. 10
2.3 Jumper Settings.......................................................................... 11
Figure 2.1: Location of Connectors and Jumpers .................. 11
Table 2.1: Summary of Jumper Settings ............................... 13
2.4 Setting the BoardID Switch (SW1) ........................................... 14
Table 2.2: BoardID Setting (SW1) ....................................... 14
2.4.1 BoardID Register .................................................................... 14
Table 2.3: BoardID register of PCI-1753 ............................. 14
2.5 Installation Instructions ............................................................. 15
Chapter 3 Operation ....................................................... 18
3.1 Overview ................................................................................... 18
3.2 Digital I/O Ports......................................................................... 18
3.2.1 Introduction ............................................................................ 18
3.2.2 8255 Mode 0 ........................................................................... 18
3.2.3 Input/Output Control .............................................................. 19
Table 3.1: Bit map of port configuration register ................. 19
3.2.4 Initial Configuration ............................................................... 19
3.2.5 Dry Contact Support for Digital Input ................................... 20
Figure 3.1: Wet and dry contact inputs .................................. 20
3.3 Interrupt Functions .................................................................... 21
3.3.1 Introduction ............................................................................ 21
3.3.2 IRQ Level ............................................................................... 21
3.3.3 Interrupt Control Registers ..................................................... 21
Table 3.2: Interrupt control register bit map ......................... 22