User Manual PCM-3353 PC/104+ SBC w/AMD LX800/ LX600, VGA, LCD, LAN, USB2.
Copyright The documentation and the software included with this product are copyrighted 2010 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable.
Declaration of Conformity FCC Class A Note: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment.
Packing List Before setting up the system, check that the items listed below are included and in good condition. If any item does not accord with the table, please contact your dealer immediately. 1 x PCM-3353 SBC 1 x Power cable 1 x Audio cable 1 x COM cable 1 x Four COM cable 1 x Keyboard/Mouse cable 1 x Y cable (for KB/MS extention) 1 x Ethernet RJ-45 Conn.conversion cable .
Contents Chapter 1 General Information ............................1 1.1 1.2 1.3 Introduction ............................................................................................... 2 Features .................................................................................................... 2 Specifications ............................................................................................ 2 1.3.1 Standard PC/104 Biscuit SBC Functions...................................... 2 1.3.
3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 Entering Setup ........................................................................................ 14 Figure 3.1 Award BIOS setup initial screen............................... 14 Standard CMOS Setup ........................................................................... 15 Figure 3.2 Standard CMOS setup screen ................................. 15 Advanced BIOS Features .......................................................................
B.1 B.2 B.3 B.4 System I/O Ports ..................................................................................... 42 Table B.1: System I/O Ports ...................................................... 42 1st MB Memory Map ............................................................................... 42 Table B.2: 1st MB Memory Map ................................................ 42 DMA Channel Assignments .................................................................... 43 Table B.
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Chapter 1 1 General Information This chapter gives background information on the PCM-3353.
1.1 Introduction The PCM-3353 is a fanless, best-cost, performance PC/104+ SBC (Single Board Computer) geared to satisfy the needs for various industrial computing equipment. PCM-3353 is ideal for communication, gaming and medical applications that require flat panel support using digital displays with TTL and LVDS interfaces and single Ethernet ports.
1.3.3 Ethernet Interface Chipset supports: 1 x 10/100 Mbps - Intel 82541PI Interface: 1 x internal box header Standard IEEE 802.3u (100 BASE-T) protocol compatible 1.3.4 Audio Function Audio controller: Realtek ALC 203 chipset, supports AC97 3D Audio stereo sound Audio interface: Microphone in, Line in, Line out 1.3.5 OS support This board supports Win XP, Win CE and Win XPe.
1.4 Board Layout: Dimensions Figure 1.1 Board layout: dimensions (component side) Figure 1.
Chapter 2 2 Installation This chapter explains the setup procedures of the PCM-3353 hardware, including instructions on setting jumpers and connecting peripherals, switches and indicators. Be sure to read all safety precautions before you begin the installation procedure.
2.1 Jumpers The PCM-3353 has a number of jumpers that allow you to configure your system to suit your application. The table below lists the functions of the various jumpers. Table 2.1: Jumper/Switch Setting J3 Clear CMOS J5 PCI VI/O Power Selector CN39 COM2 Setting SW1 CF Master / Slave Selector J6 LVDS Power Selector 2.2 Connectors Onboard connectors link the PCM-3353 to external devices such as hard disk drives, a keyboard, or floppy drives.
Chapter 2 2.3 Locating Connectors &1 - - - &1 &1 &1 &1 - &1 &1 &1 &1 &1 &1 &1 6: &1 &1 &1 &1 &1 &1 &1 &1 &1 Figure 2.1 Connectors (component side) Figure 2.
2.4 Setting Jumpers You may configure your card to match the needs of your application by setting jumpers. A jumper is a metal bridge used to close an electric circuit. It consists of two metal pins and a small metal clip (often protected by a plastic cover) that slides over the pins to connect them. To “close” a jumper, you connect the pins with the clip. To “open” a jumper, you remove the clip. Sometimes a jumper will have three pins, labeled 1, 2 and 3.
The board provides 1 IDE channel which you can attach up to two Enhanced Integrated Drive Electronics hard disk drives or CDROM to the board’s internal controller. Its IDE controller uses a PCI interface. This advanced IDE controller supports faster data transfer, PIO mode 3, mode 4 and up to UDMA 33/66. 2.6.1 Connecting the Hard Drive 2.7 Solid State Disk The board provides a CompactFlash card type I socket and type II for optional kit. 2.7.
2.10 Power Connectors (CN38) 2.10.1 Main Power Connector, +5 V, +12 V (CN38) Supplies main power +5 V to the PCM-3353, and to devices that require +12 V. 2.10.2 Power Reset Button Momentarily pressing the reset button will activate a reset. The switch should be rated for 10 mA, 5 V. 2.11 Audio Interfaces (CN34/35) 2.11.
Four PCM-3353 series, the board supports 1 channel 18-bit LVDS LCD panel displays. 2.14 Ethernet Configuration The board is equipped with one high performance 32-bit PCI-bus Ethernet interface which are fully compliant with IEEE 802.3U 10/100Mbps standards. They are supported by all major network operating systems. 100Base-T connections are made via one internal 10-pin box header. 2.
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Chapter 3 3 Award BIOS Setup
3.1 Introduction Award’s BIOS ROM has a built-in setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed memory (CMOS RAM) so that it retains the setup information when the power is turned off. 3.1.1 CMOS RAM Auto-backup and Restore The CMOS RAM is powered by an onboard button cell battery. When you finish BIOS setup, the data in CMOS RAM will be automatically backed up to Flash ROM.
Choose the “Standard CMOS Features” option from the “Initial Setup Screen” menu, and the screen below will be displayed. This menu allows users to configure system components such as date, time, hard disk drive, video, Halt On, display, and memory. Chapter 3 3.3 Standard CMOS Setup Award BIOS Setup Figure 3.2 Standard CMOS setup screen Date The date format is , , , . Time The time format is in : : , based on 24-hour time.
3.4 Advanced BIOS Features The “Advanced BIOS Features” screen appears when choosing the “Advanced BIOS Features” item from the ìInitial Setup Screenî menu. It allows the user to configure the board according to his particular requirements. Below are some major items that are provided in the Advanced BIOS Features screen. A quick booting function is provided for your convenience. Simply enable the Quick Booting item to save yourself valuable time. Figure 3.
Security Option [Setup] System System can not boot and can not access to Setup page if the correct password is not entered at the prompt. Setup System will boot, but access to Setup is denied if the correct password is not entered at the prompt. (Default value) Note! These typematic settings apply to systems that communicate with the keyboard via BIOS. For Windows systems, typematic settings are controlled by keyboard driver settings in Windows Control Panel.
Small Logo (EPA) Show [Disabled] Show EPA logo during system post stage. Cyrix 6X86/MII CPUID [Enabled] This item allows user to control BIOS enabled or disabled CPUID for CPU Cyrix/ MII. 3.5 Advanced Chipset Features Figure 3.4 Advanced chipset features screen Note! This Advanced Chipset Features screen controls the configuration of the board’s chipset for fine-tuning system performance. Screen options depend on the specific chipset.
3.6 Integrated Peripherals Figure 3.5 Integrated peripherals screen IDE Master/Slave PIO/UDMA Mode, IDE Master/Slave PIO/UDMA Mode (Auto) has a master and a slave, making two IDE devices possible. Because each IDE device may have a different Mode timing (0, 1, 2, 3, 4), it is necessary for these to be independent. The default setting “Auto” will allow auto detection to ensure optimal performance.
IDE Primary Slave UDMA [Auto] This item allows adjustment of primary slave IDE mode or type for modification purposes. Suggested BIOS default value is "Auto". IDE DMA transfer access [Enabled] This item allows adjustment of IDE DMA mode. Enabling increases IDE Data transfer speed. Suggested BIOS default value is "Enabled". LAN1 controller [Enabled] This item enables/disables the onboard LAN switch.
Parallel Port Mode [Standard] This item allows user to change parallel port mode. User can choose "SPP", "EPP", "ECP" and "ECP+EPP". SPP (Standard Parallel Port). ECP (Extended Capabilities Port). EPP (Enhanced Parallel Port). Suggested BIOS default value is "Normal". ECP Mode Use DMA [3] This selection is available only if you select ìECPî or ìECP + EPPî in the Parallel Port Mode field. In ECP Mode Use DMA, you can select DMA channel 1, DMA channel 3, or Disable. Leave this field on the default setting.
3.8 Max. Power Saving Maximum power management., Suspend Mode = 1 min., and HDD Power Down = 1 min. User Defined (Default) Allows you to set each mode individually. When not disabled, each of the ranges are from 1 min. to 1 hr. except for HDD Power Down which ranges from 1 min. to 15 min. and disable. Modem Use IRQ This determines the IRQ which the MODEM can use. The choices: 3, 4, 5, 7, 9, 10, 11, NA.
3.9 PC Health Status This is to check the PC health, e.g.: current CPU temperature. Figure 3.8 PC health status screen Current CPU Temp [Show Only] This item displays current system and CPU temperature. 5 V / 12 V [Show Only] This item displays current CPU and system Voltage. 23 PCM-3353 User Manual Award BIOS Setup Resources Controlled By [Auto (ESCD)] – IRQ Resources This item allows you respectively to assign interrupt types for IRQ-3, 4, 5, 7, 9,10, 11,12, 14, and 15.
3.10 Load Optimized Defaults Figure 3.9 Load optimized defaults screen The PCM-3353 automatically configures all setup items to optimal settings when you select this option. Optimal Defaults are designed for maximum system performance, but may not work best for all computer applications. In particular, do not use the Optimal Defaults if your computer is experiencing system configuration problems. Select Load Optimal Defaults from the Exit menu and press . 3.11 Password Setting Figure 3.
Figure 3.11 Save & exit setup screen If you select this and press , the values entered in the setup utilities will be recorded in the CMOS memory of the chipset. The microprocessor checks this every time you turn your system on and compares this to what it finds as it checks the system. This record is required for the system to operate. 25 PCM-3353 User Manual Award BIOS Setup 3.12 Save & Exit Setup Chapter 3 To change the password: 1.
3.13 Exit without Saving Figure 3.12 Exit without saving screen Selecting this option and pressing lets you exit the setup program without recording any new values or changing old ones.
Appendix A A Pin Assignments This appendix contains information of a detailed or specialized nature.
A.1 Jumper and Connector Tables Table A.1: SW1, CF Master / Slave Selector Part Number 1600000071 Footprint JH2X1V-2M Description PIN HEADER 2*1P 180D (M)SQUARE 2.0mm Setting Function (1 - 2) Master (default) (2 - 3) Slave Table A.2: J3, Clear CMOS Part Number 1653003101 Footprint JH3X1V-2M Description PIN HEADER 3*1P 180D (M)SQUARE 2.0mm Setting Function (1 - 2) BAT (default) (2 - 3) Clear-CMOS Table A.
Appendix A Pin Assignments Table A.4: J5, PCI VI/O POWER Part Number 1653003101 Footprint JH3X1V-2M Description PIN HEADER 3*1P 180D (M)SQUARE 2.0mm Setting Function (1 - 2) With +5 V (2 - 3) With +3.3 V (defualt) Table A.5: J6, LVDS Power Selector 1 2 3 4 5 6 Part Number 1653003260 Footprint HD_3x2P_79 Description PIN HEADER 3*2P 180D (M) 2.0mm SMD SQUARE PIN Setting Function (1 - 3) +3.3 V (default) (3 - 4) +12 V (3 - 5) +5 V Table A.
12 NONE 13 D2- 14 NONE 15 CLK+ 16 D3+ 17 CLK- 18 D3- 19 +12 V/+5 V/+3.3 V PWR +12 V/+5 V/+3.3 V 20 +12 V/+5 V/+3.3 V PWR +12 V/+5 V/+3.3 V I/O I/O I/O Table A.7: CN38, Power Input 8 1 Part Number 1655308020 Footprint PWR-B4PV Description PIN HEADER DIP 8*1P 180D(M) 2.00mm Pin Pin Name Signal Type Signal Level 1 +5 V PWR +5 V 2 +5 V PWR +5 V 3 +5 V PWR +5 V 4 GND GND - 5 GND GND - 6 GND GND - 7 GND GND - 8 +12 V PWR +12 V Table A.
+3.3 V PWR +3.3 V 7 TV-CLK CLK48M +3.3 V 8 GND GND - 9 D0 I/O +3.3 V 10 D1 I/O +3.3 V 11 D2 I/O +3.3 V 12 D3 I/O +3.3 V 13 D4 I/O +3.3 V 14 D5 I/O +3.3 V 15 D6 I/O +3.3 V 16 D7 I/O +3.3 V 17 D8 I/O +3.3 V 18 D9 I/O +3.3 V 19 D10 I/O +3.3 V 20 D11 I/O +3.3 V 21 D12 I/O +3.3 V 22 D13 I/O +3.3 V 23 D14 I/O +3.3 V 24 D15 I/O +3.3 V 25 D16 I/O +3.3 V 26 D17 I/O +3.3 V 27 D18 I/O +3.3 V 28 D19 I/O +3.3 V 29 D20 I/O +3.
2 GND GND - 3 ENABKL OUT +3.3V 4 VBR OD +3.3V 5 +5V PWR +5V Table A.10: CN6, SMBus 2 1 Part Number 1653002101 Footprint JH2X1V-2M Description PIN HEADER 2*1P 180D (M)SQUARE 2.0mm Pin Pin Name Signal Type Signal Level 1 SMB-CLK CLK +3 V 2 SMB-DAT I/O +3 V Table A.
GPIO0 I/O +5 V 3 GPIO1 I/O +5 V 4 GPIO2 I/O +5 V 5 GPIO3 I/O +5 V Table A.13: CN37, GPIO2 5 4 3 2 1 Part Number 1653010100 Footprint JH5X2S-2M Description PIN HEADER SMD 5*1P 180D(M) 2.54mm Pin Pin Name Signal Type Signal Level 1 GPIO4 I/O +5 V 2 GPIO5 I/O +5 V 3 GPIO6 I/O +5 V 4 GPIO7 I/O +5 V 5 GND - - Table A.14: CN11, IDE Part Number 1653222262 Footprint BH22X2SV Description BOX HEADER SMD 22*2P 180D(M) 2.
16 D14 I/O +5 V 17 D0 I/O +5 V 18 D15 I/O +5 V 19 GND GND - 21 DREQ Out +5 V 22 GND GND - 23 IOW# Out +5 V 24 GND GND - 25 IOR# Out +5 V 26 GND GND - 27 IORDY Out +5 V 28 CSEL# Out +5 V 29 DACK# Out +5 V 30 GND GND - 31 IRQ14 In +5 V 32 NC - - 33 A1 In +5 V 34 D66DET# In +5 V 35 A0 In +5 V 36 A2 In +5 V 37 CS#1 Out +5 V 38 CS#3 Out +5 V 39 ASP# Out +5 V 40 GND GND - 41 +5 V PWR +5 V 42 +5 V PWR +5 V 43 G
10 10 89 68 47 26 Part Number 59 47 35 23 11 1653005260 Footprint JH5X2S-2M Description PIN HEADER 5*2P 180D(M) 2.0mm SMD IDIOT-PROOF Pin Pin Name Signal Type Signal Level 1 +5 V PWR +5 V 2 +5 V PWR +5 V 3 P0- I/O USB 4 P1- I/O USB 5 P0+ I/O USB 6 P1+ I/O USB 7 GND GND - 8 GND GND - 9 GND GND - 10 NC - - Table A.17: CN17, USB3/4 10 10 89 68 47 26 Part Number 59 47 35 23 11 1653005260 Footprint JH5X2S-2M Description PIN HEADER 5*2P 180D(M) 2.
Table A.18: CN30, COM1/2/3/4 39 37 3 1 40 38 4 2 Part Number 1653220260 Footprint BH20X2SV-2.
GND GND - 40 GND - - Table A.19: CN19, Print Port 25 23 3 1 26 24 4 2 Part Number 1653213260 Footprint BH13x2SV-2.00 Description BOX HEADER SMD 13*2P 180D(M) 2.
Table A.20: CN20, RS422/485 4 3 2 1 Part Number 1653004101 Footprint JH4X1V-2M Description PIN HEADER 4*1P 180D(M) SQUARE 2.0mm Pin Pin Name Signal Type Signal Level 1 422-RXD- In +5 V 2 422-RXD+ In +5 V 3 485-422-TXD+ Out +5 V 4 485-422-TXD- Out +5 V Table A.21: CN35, AUDIO-OUT 3 2 1 Part Number 1655303120 Footprint WHL3V-2M Description WAFER BOX 2.
3 2 1 Part Number 1653003101 Footprint JH3X1V-2M Description PIN HEADER 3*1P 180D (M)SQUARE 2.0 mm Pin Pin Name Signal Type Signal Level 1 -12 V PWR -12 V 2 -5 V PWR -5 V 3 GND GND - Table A.24: CN26, LAN1 10 10 89 68 47 26 59 47 35 23 11 Part Number 1653205260 Footprint BH5X2SV Description BOX HEADER SMD 5*2 180D (M) 2.0 mm Pin Pin Name Signal Type Signal Level 1 +3.3 V PWR +3.
Table A.25: CN18, KB/MS 6 5 4 3 2 1 Part Number 1655306020 Footprint BH5X2SV Description BOX HEADER DIP 6*1 180D (M) 2.0 mm Pin Pin Name Signal Type Signal Level 1 KB-CLK IN +5 V 2 KB-DATA IN +5 V 3 MS-CLK IN +5 V 4 GND PWR - 5 +5 V PWR +5 V 6 MS-DATA IN +5 V Table A.26: CN40, DDR RAM SOCKET Part Number 1651000051 Footprint Description SODIMM 200P DDR SMD Table A.27: CN41, CF SOCKET Part Number 1653025211 Footprint JH5X2S-2M Description HEADER 50P 90D Table A.
Appendix B B System Assignments This appendix contains information of a detailed nature.
B.1 System I/O Ports Table B.1: System I/O Ports Addr.
Addr. range (Hex) Device * If Ethernet boot ROM is disabled (Ethernet ROM occupies about 16 KB) * E0000 - EFFFF is reserved for BIOS POST B.3 DMA Channel Assignments Table B.3: DMA Channel Assignments Channel Function 0 Available 1 Available (audio) 2 Floppy disk (8-bit transfer) 3 Available (parallel port) 4 Cascade for DMA controller 1 5 Available 6 Available 7 Available * Audio DMA select 1, 3, or 5 ** Parallel port DMA select 1 (LPT2) or 3 (LPT1) B.4 Interrupt Assignments Table B.
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Appendix C Watchdog Timer Sample Code C
C.1 Watchdog Function ;The SCH3114 Runtime base I/O address is 800h ;Setting WatchDog time value location at offset 66h ;If set value "0", it is mean disable WatchDog function. Superio_GPIO_Port = 800h mov dx,Superio_GPIO_Port + 66h mov al,00h out dx,al .model small .486p .stack 256 .data SCH3114_IO EQU 800h .code org 100h .
47 PCM-3353 User Manual Appendix C Watchdog Timer Sample Code ;==================================================== mov dx,SCH3114_IO + 68h mov al,01h out dx,al .
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Appendix D D GPIO Sample Code
D.1 GPIO Sample Code ;=============================================================== === NEWIODELAY Macro out 0ebh,al ENDM ;=============================================================== ==== .model small .486p .stack 256 .
Error_Str1 hook! ',0Ah,0Dh,'$' 'Fifth GPIO Chip Test Fail !! ',0Ah,0Dh,'$' 'Sixth GPIO Chip Test Fail !! ',0Ah,0Dh,'$' 'Seventh GPIO Chip Test Fail !!',0Ah,0Dh,'$' 'Eighth GPIO Chip Test Fail !! ',0Ah,0Dh,'$' db 'Error !! The system has no GPIO Chip or no support INT15 ;=============================================================== ==== ; Main Program Start ;=============================================================== ==== .code org 100h .
;=============================================================== ==== ;=============================================================== ==== ; Get GPIO Config ; Input: ; ax=5E87h ; bh=01h ; cl= n ; n means which group of GPIO you want to get ; output: ; ax=5E78 ;function success, other value means function fail ; bl= the n group of gpio config ; bit 0 = gpio 0 , 0 => output pin; 1 => input pin ; bit 1 = gpio 1 , 0 => output pin; 1 => input pin ; .....
;=============================================================== ==== ; Set GPIO status ; Input: ; ax=5E87h ; bh=04h ; cl= n ; n means which group of GPIO you want to set ; bl= the n group of gpio status ; bit 0 = gpio 0 , 0 => Low; 1 => High ; bit 1 = gpio 1 , 0 => Low; 1 => High ; .....
int 15h ;3. Check GPI 1,3,5,7 value pop cx ;restore NO. of GPIO chip push cx ;save NO. of GPIO chip mov ax,5e87h mov bx,03FFh int 15h pop cx push cx dec cx ;restore NO. of GPIO chip ;save NO. of GPIO chip mov al,Fail_lenght mul cl lea dx, Fail_Str add dx,ax cmp bl,00 jne test_result ;4. Set GPIO 0,2,4,6 Output differential pop cx ;restore NO. of GPIO chip push cx ;save NO. of GPIO chip mov ax,5e87h mov bx,0411h int 15h ;5. Check GPI 1,3,5,7 value pop cx ;restore NO. of GPIO chip push cx ;save NO.
pop cx push cx dec cx Appendix D GPIO Sample Code jne test_fail ;4.Set GPIO 1,3,5,7 as output,GPIO 0,2,4,6 as input pop cx push cx mov ax,5e87h mov bx,0255h int 15h ;4. Set GPIO 1,3,5,7 Output High pop cx ;restore NO. of GPIO chip push cx ;save NO. of GPIO chip mov ax,5e87h mov bx,04ffh int 15h ;6. Check GPIO 0,2,4,6 value pop cx ;restore NO. of GPIO chip push cx ;save NO. of GPIO chip mov ax,5e87h mov bx,0300h int 15h ;restore NO. of GPIO chip ;save NO.
pop cx push cx dec cx ;restore NO. of GPIO chip ;save NO. of GPIO chip mov al,Fail_lenght mul cl lea dx, Fail_Str add dx,ax cmp bl,33h jne test_result pop push dec mov mul lea add cx ;restore NO. of GPIO chip cx ;save NO. of GPIO chip cx al,Success_lenght cl dx, Success1_Str dx,ax ;Do Second PCA9554 test ;1.Set GPIO 0,2,4,6 as output, GPI 1,3,5,7 as input test_result: mov ah,09h int 21h pop cx dec cx jnz next_test Finish_Test: popa .
call Appendix D GPIO Sample Code NEWIODELAY CT_Chk_SMBus_Ready pop ax mov dl,03h out dx,al NEWIODELAY NEWIODELAY ;Index mov dl,02h mov al,48h out dx,al NEWIODELAY NEWIODELAY ;Read data mov cx, 100h @@: newiodelay loop short @B call CT_Chk_SMBus_Ready mov dl,05 in al,dx NEWIODELAY NEWIODELAY ;Data0 ret Ct_I2CReadByteEndp ;============================================================== ;Input : CL - register index ; CH - device ID ; AL - Value to write ;Output: none ;================================
call call Delay5ms Delay5ms call CT_Chk_SMBus_Ready pop mov out call call ax dl,03h dx,al Delay5ms Delay5ms ;Index pop mov out call call ax dl,05 dx,al Delay5ms Delay5ms ;Data0 mov mov out call call dl,02h al,48h dx,al Delay5ms Delay5ms ;write data mov cx, 100h @@: newiodelay loop short @B call CT_Chk_SMBus_Ready ret Ct_I2CWriteByteEndp CT_Chk_SMBus_ReadyProcNear mov dx,SMBus_Port + 0;status port clc mov cx,0800h Chk_I2c_OK: in al,dx ;get status NEWIODELAY out dx,al ;clear status NEWIODELAY t
test al,04h ;device error jnz short SMBus_Err loop short Chk_I2c_OK ;SMbus error due to timeout SMBus_Err: stc ret Clear_final: clc ret CT_Chk_SMBus_ReadyEndp ;;=============================================================== === Delay5msprocnear push cx mov cx, 1000 @@: NEWIODELAY loop short @B pop cx ret Delay5ms ENDP Phoenix_debuger proc near pushf push cx push offset PhdebugRetAddr push cs push cs db 0EAh dw 0013h dw 0DA00h PhdebugRetAddr: popf Phoenix_debuger endp ;=====================================
;=============================================================== ==== END PCM-3353 User Manual 60
Appendix D GPIO Sample Code PCM-3353 User Manual 61
www.advantech.com Please verify specifications before quoting. This guide is intended for reference purposes only. All product specifications are subject to change without notice. No part of this publication may be reproduced in any form or by any means, electronic, photocopying, recording or otherwise, without prior written permission of the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. © Advantech Co., Ltd.
