SERVICE MANUAL HP 1650B/1651B Logic Analyzer SERIAL NUMBERS This manual applies directly to instruments prefixed with serial number: 2924A For additional information about serial numbers see INSTRUMENTS COVERED BY THIS MANUAL in Section 1. ã COPYRIGHT HEWLETT-PACKARD COMPANY/COLORADO DIVISION 1989 1900 GARDEN OF THE GODS ROAD, COLORADO SPRINGS, COLORADO U.S.A. ALL RIGHTS RESERVED Manual Part No. 01650-90915 Microfiche Part No. 01650-90815 Printed in U.S.A.
Dear Customer: You have probably heard from news reports and from your sales representative that as of November 1, 1999, four of Hewlett-Packard's businesses became a new company -- Agilent Technologies. The new company includes the following former HP businesses: test and measurement, semiconductor products, healthcare solutions and chemical analysis.
Herstellerbescheinigung Hiermit wird bescheinigt, da b das Gerät/System in Übereinstimmung mit den Bestimmungen von Postverfügung 1046/84 funkentstört ist. Der Deutschen Bundespost wurde das Inverkehrbringen dieses Gerätes/Systems angezeigt und die Berechtigung zur Überprüfung der Serie auf Einhaltung der Bestimmungen eingeräumt.
CERTIFICATION Hewlett-Packard Company certifies that this product met its published specifications at the time of shipment from the factory. Hewlett-Packard further certifies that its calibration measurements are traceable to the United States National Institute of Standards and Technology, to the extent allowed by the Institute’s calibration facility, and to the calibration facilities of other International Standards Organization members.
Safety Considerations General Operation General Warnings and Cautions This is a Safety Class I instrument (provided with terminal for protective earthing). BEFORE APPLYING POWER verify that the power transformer primary is matched to the available line voltage, the correct fuse is installed, and Safety Precautions are taken (see the following warnings). In addition, note the instrument’s external markings which are described under "Safety Symbols.
Printing History New editions are complete revisions of the manual. Update packages, which are issued between editions, contain additional and replacement pages to be merged into the manual by the customer. The dates on the title page change only when a new edition is published. A software and/or firmware code may be printed before the date; this indicates the version level of the software and/or firmware of this product at the time of the manual or update was issued.
List of Effective Pages The List of Effective Pages gives the date of the current edition and of any pages changed in updates to that edition. Within the manual, any page changed since the last edition is indicated by printing the date the changes were made on the bottom of the page. If an update is incorporated when a new edition of the manual is printed, the change dates are removed from the bottom of the pages and the new edition date is listed in Printing History and on the title page.
Contents Section 1: General Information Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Instruments Covered by this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Safety Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Section 3: Performance Tests Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Recommended Test Equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Test Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Test Record . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Section 6: Service Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents Section 1 General Information Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Instruments Covered by this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Safety Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1 General Information Introduction This service manual explains how to test, adjust, and service the HP 1650B and HP 1651B Logic Analyzers. This manual is divided into six sections: · General Information · Installation · Performance Tests · Adjustments · Replaceable Parts · Service This section of the manual includes a description of the HP 1650B/51B Logic Analyzers, specifications, options, available accessories, and recommended test equipment.
Safety Considerations This product is a Safety Class 1 instrument (provided with a protective earth terminal). Review the instrument and manual for safety markings and instructions before operating. Specific warnings, cautions, and instructions are placed wherever applicable throughout the manual. These precautions must be observed during all phases of operation, service, and repair of the instrument.
Accessories Supplied Accessories Available HP 1650B/1651B Service Manual The following accessories are supplied with the HP 1650B/51B Logic Analyzer. · Woven probe cable (HP part number 01650-61607) with 40-pin connector on each side, 17 signal lines, 17 return lines, 2 power lines, and 2 power ground lines. Each power line supplies + 5 volts for preprocessor power. Each cable supplies 600 milliamperes with a maximum power available from the HP 1650B/51B of 2 amperes.
Logic Analyzer Specifications The following specifications are the performance standards or limits against which the HP 1650B/51B Logic Analyzer is tested. Probes Minimum Swing: 600 mV peak-to-peak. Threshold Accuracy: State Mode Voltage Range Accuracy -2.0V to + 2.0V ± 150 mV -9.9V to -2.1V ± 300 mV + 2.1V to + 9.9V ± 300 mV Clock Repetition Rate: Single phase is 35 MHz maximum. With time or state counting, minimum time between states is 60 ns (16.67 MHz).
Operating Characteristics The following operating characteristics are are typical operating characteristics for the HP 1650B/51B Logic Analyzer. Probes Input RC: 100 KW ± 2% shunted by approximately 8 pF at the probe tip. TTL Threshold Preset: + 1.6 volts. ECL Threshold Preset: -1.3 volts. Threshold Range: -9.9 to + 9.9 volts in 0.1V increments. Threshold Setting: Threshold levels may be defined for pods 1 and 2 individually (HP 1651B).
State Analysis MEMORY Data Acquisition: 1024 samples/channel. Trace Specification Clocks: Five clocks (HP 1650B) or two clocks (HP 1651B) are available and can be used by either one or two state analyzers at any time. Clock edges can be ORed together and operate in single phase, two phase demultiplexing, or two phase mixed mode. Clock edge is selectable as positive, negative, or both edges for each clock.
Tagging State Tagging: Counts the number of qualified states between each stored state. Measurement can be shown relative to the previous state or relative to trigger. Maximum count is 4.4 X (10 to the 12th power). Time Tagging: Measures the time between stored states, relative to either the previous state or the trigger. Maximum time between states is 48 hours. With tagging on, the acquisition memory is halved; minimum time between states is 60 ns.
Overlay Mode: Multiple channels can be displayed on one waveform display line. Primary use is to view summary of bus activity. Maximum Number Of Displayed Waveforms: 24 Time Interval Accuracy Channel to Channel Skew: 4 ns typical. Time Interval Accuracy: ± (sample period + channel-to-channel skew + 0.01% of time interval reading). Trigger Specification Asynchronous Pattern: Trigger on an asynchronous pattern less than or greater than specified duration.
Indicators Activity Indicators: Provided in the Configuration, State Format, and Timing Format menus for identifying high, low, or changing states on the inputs. Markers: Two markers (X and 0) are shown as dashed lines on the display. Trigger: Displayed as a vertical dashed line in the timing waveform display and as line 0 in the state listing display.
Humidity: Instruments up to 95% relative humidity at + 40°C; (104°F). Recommended humidity range for disk media, 8% to 80% relative humidity at + 40°C (+ 104°F). Altitude: To 4600 m (15,000 ft). Vibration: Operating: Random vibration 5-500 Hz, 10 minutes per axis, &2.41 g (rms). Non-operating: Random vibration 5-500 Hz, 10 minutes per axis, & 2.41 g (rms); and swept sine resonant search, 5-500 Hz, 0.75 g (0-peak), 5 minute resonant dwell @ 4 resonances per axis. Weight: 10.0 kg (22 lbs) net; 18.
Table 1-1. Recommended Test Equipment Equipment Required Critical Specifications Recommended Model Use * Oscilloscope dual channel dc to 300 MHz HP 54502A P,T Pulse Generator 5 ns pulse width 20 ns period 1.3 ns risetime double pulse 100 kHz Repetition Rate Overshoot: 5% of Amp. HP 8161A/020 P Power Supply + or - 10.2 V output current: 0 - 0.4 amperes HP 6216B P Adapter BNC(f)-to-Dual Banana HP Part Number 1251-2277 P DMM 5.
Section 2 Installation Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Safety Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Initial Inspection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Installation 2 Introduction This section of the manual contains information and instructions necessary for setting up the HP 1650B/51B Logic Analyzer. This includes inspection procedures, power requirements, hardware connections and configurations, and packaging information. Safety Considerations The safety symbols used with Hewlett-Packard instruments are illustrated in the front of this manual. WARNING and CAUTION symbols and instructions should be reviewed before operating the instrument.
Line Voltage Selection When shipped from the factory, the line voltage selector is set and an appropriate fuse is installed for operating the instrument in the country of destination. To operate the instrument from a power source other than the one set at the factory: 1. Turn the rear power switch to the OFF position and remove the power cord from the instrument. 2. Remove the fuse module by carefully prying it at the top center of the module until you can grasp it and pull it out by hand as shown below.
3. Reinsert the fuse module with the arrows aligned for your application. See fuse module below. Figure 2-2. Fuse Module 4. Reconnect the power cord, turn the rear power switch to the ON position, and continue normal operation. Power Cable This instrument is equipped with a three-wire power cable. When connected to an appropriate AC power outlet, this cable grounds the instrument cabinet. The type of power cable plug shipped with the instrument depends on the country of destination.
Table 2-1.
User Interface The front-panel user interface of the HP 1650B/51B consists of front-panel keys, the KNOB, and display. The interface allows configuration of each analyzer (machine) within the logic analyzer. It also displays acquired data and measurement results.
Figure 2-3. HP 1650B Rear Panel HP-IB Address Selection Each instrument connected to the HP-IB interface bus requires a unique address. The address provides a method for the system computer to select individual instruments on the bus. The address of the HP 1650B/51B defaults at power up to decimal "07". The corresponding ASCII code is a listen of "’" and a talk address of "G." To change the address of the HP 1650B/51B proceed as follows: 1.
Figure 2-4. External I/O Port Configuration Menu 4. Select the HP-IB Address field with the KNOB and press the SELECT key. 5. When the pop-up field appears on screen, rotate the KNOB to select the desired HP-IB address. 6. Press the SELECT key to enter the new address. 7. Select the DONE field in the upper-right corner with the KNOB to exit the External I/O Port Configuration menu.
Table 2-1. RS-232-C Signal Definitions Pin No.
4. Using the KNOB and SELECT key, configure the RS-232-C interface as desired. 5. Select the DONE field in the upper-right corner with the KNOB to exit the External I/O Port Configuration menu. Operating Environment The operating environment for the HP 1650B/51B is described in table 1-2. Note the non-condensing humidity limitation. Condensation within the instrument cabinet can cause poor operation or malfunction.
Original Packaging If the original packaging material is unavailable or unserviceable, materials identical to those used in factory packaging are available through Hewlett-Packard offices. If the instrument is to be shipped to a Hewlett-packard office for service, attach a tag identifying the owner, address of the owner, complete instrument model and serial numbers, and a description of the service required. Mark the container FRAGILE to ensure careful handling.
Contents Section 3 Performance Tests Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Recommended Test Equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Test Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Test Record . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Performance Tests Introduction These procedures test the electrical performance of the logic analyzer by using the specifications in table 1-1 as the performance standards. All tests may be performed without access to the interior of the instrument. Recommended Test Equipment Equipment required for the performance tests in this section is listed in the Recommended Test Equipment table in Section 1.
Self Tests The power-up self test is automatically performed upon applying power to the logic analyzer. Since the performance tests require test equipment, self tests may be performed individually to provide a higher level of confidence that the instrument is operating properly. A message that the instrument has failed the test will appear if any problem is encountered during the test. The individual self tests may be performed for functions listed in the self test menu which is invoked via the I/O menu.
Selectable Self Seven self tests may be invoked individually via the Self Test menu. The seven Tests selectable self tests are: · · · · · · · · Data Acquisition RS-232-C External Trigger BNCs Keyboard RAM ROM Disk Drive Cycle through all tests The required test is selected by moving the cursor to the test and pressing the front panel SELECT key. A pop-up menu appears with a description of the test to be performed.
Clock, Qualifier, and Data Inputs Test 1 Description: This test verifies maximum clock rate with counting mode for the HP 1650B/51B. This test also verifies the setup and hold times for the falling edge of the HP 1650B L clock specification, and the falling edge of the HP 1651B J and K clock specification. Specification: Clock repetition rate: with time or state counting mode on, minimum time between states is 60 ns. Setup time: Data must be present prior to clock transition; ³ 10 ns.
2. Adjust pulse generator for the output in figure 3-3. Figure 3-3. Waveform for Data Test 1 Setting for HP 8161A: Parameter Output A Output B Input Mode Period (PER) Width (WID) Leading Edge (LEE) Trailing Edge (TRE) High Level (HIL) Low Level (LOL) Delay (DEL) Output Mode Norm 60 ns 10 ns 1 ns 1 ns 3.2 V 0V 0 ns ENABLE ----10 ns 1 ns 1 ns 3.2 V 0V 0 ns ENABLE 3. Assign the pod under test to Analyzer 1 in the System Configuration as in 3-4. Refer to steps a through c if unfamiliar with menu.
4. In the State Format Specification assign Clock Period > 60 ns. Also assign lower 8 channels of the pod under test to a label as shown in next figure . If testing HP 1650B then assign falling edge of L clock for all pods. If testing HP 1651B then assign falling edge of J clock for all pods. Refer to steps a through c if unfamiliar with the menus. Figure 3-5. State Format Specification for Data Test 1 a. Press front-panel FORMAT key. b. Move cursor to Clock field of menu.
c. Move cursor to the bit assignment field and turn on appropriate eight bits to be tested (* = on; . = off) as in figure below. Figure 3-7. Bit Assignment for Data Test 1 5. Set up the State Trace Specification without sequencing levels and set Count States as in next figure. Figure 3-8. Trace Specification for Data Test 1 a. Press front-panel TRACE key. b. Move cursor to Count, press SELECT, then move cursor to States, press SELECT, and set to any state by pressing SELECT again.
6. Press RUN. The State Listing is displayed and shows Fs for the channels under test, when test is passed, as in figure 3-9. Figure 3-9. State Listing for Data Test 1 Note To ensure consistent pattern of Fs in listing, use front-panel ROLL field and knob to scroll through State Listing. 7. If testing the HP 1651B, connect the K clock of Pod 2 to the test connector and repeat steps 4 and 6 for the falling edge of K clock. 8.
Clock, Qualifier, and Data Inputs Test 2 Description: This test verifies the setup and hold time specification for the rising edge transition of all clocks on the HP 1650B/51B. Specification: Setup time: Data must be present prior to clock transition; ³ 10 ns. Hold time: Data must be present after rising clock transition; 0 ns. Equipment: Pulse Generator ............................. HP 8161A/020 Oscilloscope ................................... HP 54502A 50 Ohm Feedthru (2) ............................
2. Adjust pulse generator for the output in figure 3-11. Pulse generator settings Figure 3-11. Waveform for Data Test 2 are different for HP 1650B and HP 1651B. Setting for HP 8161A: Parameter Input Mode Period (PER) HP 1650B HP 1651B Width (WID) HP 1650B HP 1651B Leading Edge (LEE) Trailing Edge (TRE) High Level (HIL) Low Level (LOL) Delay (DEL) Output Mode Output A Output B Norm --- 28.5 ns 40 ns ----- 18.5 ns 30 ns 1 ns 1 ns 3.2 V 0V 0 ns ENABLE 18.5ns 30 ns 1 ns 1 ns 3.2 V 0V 0 ns ENABLE 3.
5. Set the State Trace Specification without sequencing levels and set Count to Off as in Figure 3-13. Figure 3-13. State Listing for Data Test 2 6. Press RUN. The State Listing is displayed and lists all 0s for the channels under test, if passed test, as in figure 3-14. Figure 3-14. Setup for Data Test 3 Note HP 1650B/1651B Service Manual To ensure consistent pattern of 0s in listing, use front-panel ROLL keys and knob to scroll through State Listing.
7. Connect the next clock to the test connector and repeat steps 4 and 6 for the appropriate clock. Repeat until all clocks have been tested (clocks J, K, L, M and N). 8. Remove the probe tip assembly from the logic analyzer probe cable and attach to the next logic analyzer probe cable to be tested. Take care not to dislodge grabbers from the test connector. 9. Repeat steps 3, 4, 6 and 7 until all pods have been tested (pods 1 through 5).
Clock, Qualifier, and Data Inputs Test 3 (HP 1650B Only) Description: This performance test verifies the hold time specification for the falling clock transitions of the J, K, M and N clock on the HP 1650B. Specification: HP 1650B Hold time: Data must be present after falling J, K, M and N clock transition; 1 ns. Equipment: Pulse Generator .............................. HP 8161A/020 Oscilloscope .................................... HP 54502A 50 ohm Terminators...............................
Setting for HP 8161A: Parameter Output A Output B Input Mode Period (PER) Width (WID) Leading Edge (LEE) Trailing Edge (TRE) High Level (HIL) Low Level (LOL) Delay (DEL) Double Pulse (DBL) Output Mode Norm 57 ns 11 ns 1 ns 1 ns 3.2 V 0V 0 ns --ENABLE ----10 ns 1 ns 1 ns 3.2 V 0V --28.5 ns ENABLE 3. Assign the pod under test to Analyzer 1 in the System Configuration as in previous test figure 3-4. 4. In the State Format Specification menu assign Clock Period < 60 ns, and falling edge of J clock.
9. Disconnect lower eight bits (bits 0 through 7) from test connector. Attach upper eight bits (bits 8 through 15) to the test connector. Repeat steps 3, 4, 6, 7 and 8 until the upper bits of all pods have been tested (pods 1 through 5). Clock, Qualifier, and Data Inputs Test 4 Description: This test verifies the minimum swing voltages of the input probes and the maximum clock rate of the HP 1650B\ 51B when it is in single phase mode. Specification: Minimum swing: 600 mV peak-to-peak.
2. Adjust pulse generator for the output in figure 3-19. Pulse generator settings are different for HP 1650B and HP 1651B. Figure 3-19. Waveform for Data Test 4 Setting for HP 8161A: Note Parameter Output A Output B Input Mode Period (PER) HP 1650B HP 1651B Width (WID) Leading Edge (LEE) Trailing Edge (TRE) High Level (HIL) Low Level (LOL) Delay (DEL) HP 1650B HP 1651B Double Pulse (DBL) HP 1650B HP 1651B Output Mode Norm --- 57 ns 80 ns 20 ns 1 ns 1 ns 1.9V 1.3V ----10 ns 1 ns 1 ns 1.
6. Press RUN. The State Listing is displayed and shows alternating Fs and 0s for the channels under test as in figure 3-20. Figure 3-20. State Listing for Data Test 4 Note To ensure consistent pattern of alternating Fs and 0s, use the front-panel ROLL keys and knob to scroll through State Listing. 7. Connect the next clock to the test connector and repeat steps 4 and 6. Repeat until all clocks have been tested (clocks J, K, L, M and N). 8.
Clock, Qualifier, and Data Inputs Test 5 Description: This performance test verifies the maximum clock rate for mixed mode clocking during state operation. Specification: Clock repetition rate: HP 1650B single phase is 35 MHz maximum, HP 1651B is 25 MHz. With time or state counting, minimum time between states is 60 ns (16.7 MHz maximum). Both mixed and demultiplexed clocking use master-slave clock timing; master clock must follow slave clock by at least 10 ns and precede the next slave clock by 50 ns.
2. Adjust pulse generator for the output in figure 3-22. Figure 3-22. Waveform for Data Test 5 Setting for HP 8161A: Parameter Output A Output B Input Mode Period (PER) Width (WID) Leading Edge (LEE) Trailing Edge (TRE) High Level HIL) Low Level (LOL) Delay (DEL) Double Pulse (DBL) Output Mode Norm 120 ns 60 ns 1 ns 1 ns 3.2 V 0V 40 ns --ENABLE ----10 ns 1 ns 1 ns 3.2 V 0V --60 ns ENABLE 3. Assign the pod under test to Analyzer 1 in the System Configuration as in previous figure 3-4. 4.
a. Move cursor to Clock field and SELECT, then assign Mixed Clocks. b. Assign falling transition of the J clock to Master Clock and rising transition of the J clock to Slave Clock. c. Assign channels 0-3 and 8-11 of the pod under test. d. Set Clock Period to > 60 ns. 5. Set the State Trace Specification without sequencing levels and Count Off as in previoius figure 3-13. 6. Press RUN. The State Listing displays alternating Fs and 0s for the channels under test as in figure 3-24. Figure 3-24.
Clock, Qualifier, and Data Inputs Test 6 Description: This performance test verifies the maximum clock rate for demultiplexed clocking during state operation. Specification: Clock repetition rate: HP 1650B single phase 35 MHz maximum, HP 1651B single phase 25 MHz. With time or state counting, minimum time between states is 60 ns (16.7 MHz maximum).
2. Adjust pulse generator for the output in figure 3-26. Figure 3-26. Waveform for Data Test 6 Setting for HP 8161A: Parameter Output A Output B Input Mode Period (PER) Width (WID) Leading Edge (LEE) Trailing Edge (TRE) High Level (HIL) Low Level (LOL) Delay (DEL) Double Pulse (DBL) Output Mode Norm 120 ns 60 ns 1 ns 1 ns 3.2 V 0V 40 ns --ENABLE ----10 ns 1 ns 1 ns 3.2 V 0V --60 ns ENABLE 3. Assign the pod under test to Analyzer 1 in System Configuration as in previous figure 3-4. 4.
b. Assign falling clock transition of J clock to Master Clock and rising J clock transition to Slave Clock. c. Assign ALL channels to pod under test (only bits 0 through 7 are be available for assignment). d. Set Clock Period to < 60 ns. 5. Set State Trace Specification without sequencing levels and set Count Off as in previous figure 3-13. 6. Press RUN. The State Listing shows alternating Fs and 0s for the pod under test as in figure 3-28. Figure 3-28.
Glitch Test Description: This performance test verifies the glitch detection specification of the HP 1650B/51B. Specification: Minimum detectable glitch: 5 ns wide at the threshold. Equipment: Pulse Generator ............................... HP 8161A/020 Oscilloscope...................................... HP 54502A 50 ohm Feedthrough.(1)............................ HP 10100C Test Connector (1) ...........................see figure 3-1 Procedure: 1. Connect the test equipment as in figure 3-29.
2. Adjust pulse generator for the output in figure 3-30. Figure 3-30. Waveform for Glitch Test Setting for HP 8161A: Parameter Output A Output B Input Mode Period (PER) Width (WID) Leading Edge (LEE) Trailing Edge (TRE) High Level (HIL) Low Level (LOL) Delay (DEL) Output Mode Norm 20 ns 5 ns 1 ns 1 ns 3.2 V 0V 0 ns ENABLE ------------------- 3. Assign the pod under test to Analyzer 1 in System Configuration as in figure 3-31. Refer to steps a and b if unfamiliar with menus. Figure 3-31.
5. Set Timing Trace Specification as in figure 3-33. Follow steps a through c if Figure 3-32. Glitch Test Timing Format Specification unfamiliar with menu. a. Move cursor to Acquisition mode field and SELECT Glitch. b. Move cursor to Find Pattern field and SELECT. Push DON’T CARE (all Xs) snd SELECT. Set Present for field to > 30 ns. c. Set Then find Glitch on all channels (all * s). Figure 3-33.
6. Press RUN. The timing analyzer acquires data and shows glitches for channels under test as in figure 3-34. SELECT Delay field and rotate knob to assure consistent glitch detection. Figure 3-34. Glitch Test Timing Waveforms Note If sample clock and data synchronize, glitches may be displayed on the timing screen as valid data transitions. 7. Remove the probe tip assembly from the logic analyzer probe cable and attach to the next logic analyzer probe cable to be tested.
Threshold Accuracy Test Description: This performance test verifies the threshold accuracy within the three ranges stated in the specification. Specification: Threshold accuracy: 150 mV accuracy over the range -2.0 to + 2.0 volts; 300 mV accuracy over the ranges -9.9 to -2.1 volts and + 2.1 to + 9.9 volts. Equipment: Power Supply .................................... HP 6216B Test Connector (1)......................... see figure 3-1 Procedure: 1. Connect the test equipment as in figure 3-35. Figure 3-35.
b. Move cursor to bit assignment field and turn on the appropriate eight bits to be tested (* = on; . = off). Figure 3-36. Threshold Accuracy Format Specification 4. Set Timing Trace Specification as in figure 3-37. Follow steps a through c if unfamiliar with menus. a. Move cursor to Acquisition mode and SELECT Glitch. b. Move cursor to Find Pattern and SELECT. Push DON’T CARE (all X s) and SELECT. Set present for field to > 30 ns. c. Set Then find Glitch to all DON’T CARES (all · s). Figure 3-37.
5. Adjust the power supply output for + 150 mV. 6. Press RUN. Data displayed on Timing Waveforms is be high for the pod and channels under test as in figure 3-38. Figure 3-38. Threshold Accuracy Timing Waveforms 1 7. Adjust power supply output for -150 mV. 8. Press RUN. Data displayed on Timing Waveforms is all low for the channels under test as in figure 3-39. Figure 3-39. Threshold Accuracy Timing Waveforms 2 9. Return to Timing Format Specification and change User Defined Pod Threshold to + 9.9 V. 10.
14. Return to the Timing Format Specification and change the User Defined pod threshold to -9.9 V. 15. Adjust power supply for output of -9.6 V. 16. Press RUN. Data displayed on Timing Waveforms is all high for the pod and channels under test as in previous test figure 3-39. 17. Adjust power supply for output of -10.2 V. 18. Press RUN. Data displayed on Timing Waveforms is all low for the pod and channels under test as in previous test figure 3-40. 19.
Table 3-1. Performance Test Record Hewlett-Packard Model 1650B/51B Logic Analyzer Tested by ____________ Work Order No.
Table 3-1.
Contents Section 4 Adjustments Introduction .................................................................................................................... 4-1 Calibration Interval ........................................................................................................ 4-1 Safety Requirements ...................................................................................................... 4-1 Recommended Test Equipment...............................................................
4 Adjustments Introduction This section provides adjustment procedures for the HP 1650B/51B. The assemblies with adjustments are: the power supply, CRT monitor, and the system board. Figures in this section are the testpoint and adjustment locations for the HP 1650B/51B. Calibration Interval The recommended calibration interval for the HP 1650B/51B is two years. The adjustments are set at the factory on assemblies when they are tested.
Recommended Test Equipment Warning Recommended test equipment for calibration and adjustment is listed in table 1-3. Any equipment that satisfies the critical specifications given in the table may be substituted for the recommended models. Read the safety summary at the front of this manual before any adjustment, replacement, maintenance, or repair is performed. Instrument Warmup Adjust and calibrate the instrument at it’s environmental ambient temperature and after a 15 minute warm-up.
Power Supply Assembly Adjustment 1. Disconnect power cord from HP 1650B/51B. Refer to figure 4-1. 2. Connect the negative lead of the voltmeter to Power Supply Assembly ground. 3. Connect the positive lead of the voltmeter to + 5V on the Power Supply Assembly. 4. Connect the power cord to the HP 1650B/51B and put power switch in ON position. 5. Voltmeter should indicate voltage within the range of + 5.180 V to + 5.220 V. 6.
CRT Monitor Assembly Adjustments Intensity, Sub-bright, and Contrast Adjustment Note 1. Refer to figure for adjustment locations. 2. Place TIMING WAVEFORMS menu on the screen of the HP 1650B/51B, by pressing front-panel DISPLAY key. This menu is used because it has characters throughout the screen which are watched during the procedures. Any other menu may be used; however, the adjustments may not be as accurate if characters and/or lines are not displayed throughout the screen. 3.
5. Turn rear-panel INTENSITY to bring up the intensity level on screen. Screen intensity should be at a comfortable viewing level and the position of both adjustments should be close to mid-range. 6. Press RUN and then STOP. 7. Adjust CONT so the error message is easily seen. Focus Adjustment 1. Refer to figure for adjustment locations. 2. Place TIMING WAVEFORMS menu on the screen of the HP 1650B/51B by pressing the front-panel DISPLAY key. 3.
Horizontal Phase, Vertical Linearity, and Height Adjustments Note 1. Refer to figure for adjustment locations. 2. Place TIMING WAVEFORMS menu on the screen of the HP 1650B/51B by pressing front-panel DISPLAY key. This menu is used because it has characters and lines throughout the menu which are watched during the procedures. Any other menu may be used, however, the adjustments may not be as accurate. 3. Adjust sweep board H. PHASE to center the menu horizontally on the CRT screen. 4.
System Board Assembly Threshold Adjustment 1. Disconnect power cord from HP 1650B/51B. 2. Connect negative (-) lead of voltmeter to TP GND. Refer to figure 4-3 for testpoint and adjustment locations. 3. Connect positive (+ ) lead of voltmeter to HP 1650B A1TP3, or HP 1651B A1TP2 on the System Board Assembly. 4. Connect power cord to logic analyzer and turn instrument power to ON. Figure 4-3. System Board Testpoints and Adjustments 5.
a. Press front-panel FORMAT key. b. Move cursor to TTL (threshold field) and press SELECT. c. Assign User defined threshold by using front-panel knob and SELECT key. 7. Voltmeter readout should indicate voltage within the range of -.975 V to -1.005 V (-.990 V % .015 V). 8. Set User defined Pod Threshold of the pod assigned in the previous step to + 9.9 V in the Format Specification menu. 9. Note voltmeter readout. Voltage reading should be within the range of + .975 V to + 1.0005 V (+ .990 V % .015 V). 10.
Contents Section 5 Replaceable Parts Introduction ................................................................................................................... 5-1 Abbreviations ................................................................................................................. 5-1 Replaceable Parts List .................................................................................................. 5-1 Exchange Assemblies ...............................................................
5 Replaceable Parts Introduction This section contains information for ordering parts. Service support for this instrument is to the assembly level. The replaceable parts include assemblies and chassis parts. Figure 5-1 shows an exploded view of the instrument. Abbreviations Table 5-1 lists the abbreviations used in the parts list and throughout this manual. Abbreviations in the replaceable parts list are in capital letters.
Ordering Information To order a replaceable part, indicate the HP part number, check digit, and quantity required. Send the order to the nearest HP Sales/Service office. To order a part that is not listed in the replaceable parts table, include the instrument model number, serial number, description and function of part, and total quantity required. Address an order to the nearest HP Sales/Service office.
Table 5-1. Reference Designator and Abbreviations REFERENCE DESIGNATOR A B BT C CR DL DS E = = = = = assembly fan;motor battery capacitor diode;diode thyristor; varactor = delay line = annunciator;lamp;LED = misc. electrical part F FL H J L MP P = = = = fuse filter hardware electrical connector (stationary portion);jack = coil;inductor = misc.
Figure 5-1.
Table 5-2.
Table 5-2.
Section 6 Service Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Service 6 Introduction This section provides troubleshooting, service, and repair information for the HP 1650B/51B Logic Analyzer. Troubleshooting consists of flowcharts, self- test descriptions and instructions for use, and signal level tables. The troubleshooting information is provided to isolate a faulty assembly. When a faulty assembly has been located, the disassembly/assembly procedures help direct replacement of the assembly.
Figure 6-1.
Theory of Operation The HP 1650B/51B Logic Analyzer is an 80/32 channel state and timing logic analyzer. The human interface is a front-panel keypad and knob for instrument control and 9" (diagonal) white phosphor CRT for information display. Available on the rear panel are RS-232-C and HP-IB ports for communication to a printer or from a controller. Also on the rear panel are two BNCs for input or output of an external trigger.
Memory The memory of the logic analyzer consists of three separate memories: one ROM and two RAMs. The system (EP)ROM is 64K long by 8 wide and is used primarily for booting-up the system and self-test storage. The system (D)RAM is 1M long by 8 wide and contains the operating system and the acquired data from the target system. Since the RAM is a volatile memory, the operating system is loaded loaded at each power-up of the instrument via the built-in disk drive and a mini floppy disk.
The DS14C88 and DS14C89 are line drivers/receivers used by the logic analyzer for interface of terminal equipment with data communications equipment. Slew rate control is provided on the ICs eliminating the need for external capacitors. Power Supply The switching power supply provides 120 W (200 W maximum) for the instrument. Assembly The ac input to the power supply is 115V or 230 V, -25 to + 15% . Maximum input power is 350 VA maximum. The ac input frequency is 48 - 66 Hz.
Trouble Isolation Flowcharts The trouble isolation flowcharts are the troubleshooting guide. Start there when repairing a defective instrument. The flowcharts refer to other tests, tables, and procedures to help isolate trouble. Disassembly procedures are included to direct in replacing faulty assemblies. The circled numbers on charts indicate the next chart to use for isolating a problem. Figure 6-2.
Figure 6-3.
Figure 6-4.
Figure 6-5.
Figure 6-6.
Figure 6-7.
Figure 6-8.
Figure 6-9. Trouble Isolation for RS-232-C Figure 6-10.
Power Supply Voltages Check Warning The power supply must be loaded by either the System Assembly Board or with an added resistor to check the voltages. This procedure is to be performed only by service-trained personnel aware of the hazards involved (such as fire and electrical shock). Power Supply Loaded by System Assembly 1. Remove instrument top cover. 2. Using the figure below, check for the voltages indicated at the testpoints. Figure 6-11.
4. Reconnect instrument power cable and check for voltages at the supply output using values in the following table. Table 6-1. Power Supply/Main Assembly Voltages Note CRT Monitor Signals Check PIN SIGNAL PIN SIGNAL 1 2 3 4 5 6 7 8 9 10 +5.20 V +5.20 V +5.20 V +5.20 V GROUND (Display) GROUND (Digital) GROUND (Digital) GROUND +3.5 V GROUND 11 12 13 14 15 16 17 18 19 20 -5.2 V GROUND +12 V GROUND -12 V GROUND +12 V (Display) -5.2 V +15.
Keyboard Signals Isolate a faulty elastomeric keypad or keyboard when random key(s) not operating Check by performing the following steps. 1. Remove instrument power cable. 2. Without disconnecting the keyboard cable, follow keyboard removal procedure to loosen keyboard. Leave keyboard in place in front of instrument. 3. Apply power. 4. Run Keyboard Self Test and press all keys. 5. Allow keyboard assembly to fall forward from front panel. Separate the elastomeric keypad and keyboard panel from the PC board.
Assembly Removal and Replacement Warning This section contains the procedures for removal and installation of major assemblies. Read the Safety Summary at the front of this manual before servicing the instrument. Hazardous voltages exist on the power supply, CRT, and the display sweep board. To avoid electrical shock, adhere closely to the following procedures.
14. Secure system board to chassis with eight screws. Note Hand-start the self-tapping screws securing the system board. Otherwise, if the holes are not aligned, damage to the board will result. 15. Set instrument upright. Install RS-232 ESD spring ground on RS-232 connector. Ensure angled wing tabs of spring ground points toward rear of instrument. 16. Place rear panel close enough to chassis to route cables through the rear of the instrument. 17. Install rear panel.
Removal and Replacement of CRT Monitor Assembly 1. Disconnect pod cables from rear of instrument. 2. Disconnect power cable. 3. Remove ten screws securing top cover. Remove top cover. 4. Connect a jumper lead between ground lug of CRT and shaft of a screwdriver. To discharge CRT, place screwdriver under protestive rubber cap of post accelerator lead and momentarily touch screwdriver to metal clip of post accelerator lead. Caution Note Discharge the post accelerator lead to a grounding lug only.
Removal and Replacement of Power Supply 1. Disconnect pod cables from rear of instrument. 2. Disconnect power cable. 3. Remove ten screws securing top cover. Remove top cover. 4. Disconnect disk drive cable from disk drive. 5. Remove two screws securing disk drive to power supply. Remove disk drive by sliding assembly out front panel of instrument. 6. Remove two retaining pins securing power supply to chassis. Slide power supply out far enough to gain unobstructed access to power supply cables. 7.
10. Align new fan on back panel with fan cable adjacent to line filter assembly and label toward rear (fan rotor is facing forward). 11. Align fan guard on back of panel. 12. Attach fan to rear panel with four machine screws. 13. Re-assemble instrument in reverse order of above. 14. Install top cover. Secure top cover to chassis using ten screws. Note Removal and Replacement of Keyboard Assembly To ensure top cover is properly installed, secure side screws of top cover before securing top screws. 1.
Self Tests Caution The extended self tests are used for isolating problems in the logic analyzer. The tests are loaded from the operating disk. The process of running the self test DESTROYS the current configuration and data. Please use a master disk (or copy) in the disk drive to run the tests.
RS-232-C Self Test The RS-232-C self test verifies the functionality of the RS-232-C driver and continuity of the RS-232-C data paths. Connect the RS-232-C loopback connector to the rear-panel RS-232-C port before beginning this test. 1. In HP 1650B/51B Self Tests menu, move cursor to RS-232-C and SELECT. 2. Move cursor to Single test or Repetitive test and SELECT. 3. If running repetitive test press and hold STOP to end test. The number of runs and failures are displayed in the menu. 4.
ROM Self Test The ROM self test verifies the operation of the system ROM. 1. In HP 1650B/51B Self Tests menu, move cursor to ROM and SELECT. 2. Move cursor to Single test or Repetitive test and SELECT. 3. If running repetitive test press and hold STOP to end test. The number of runs and failures are displayed in the menu. 4. To return to HP 1650B/51B Self Tests menu, move cursor to Done and SELECT.
