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State Analysis MEMORY
Data Acquisition: 1024 samples/channel.
Trace Specification
Clocks: Five clocks (HP 1650B) or two clocks (HP 1651B) are available and can
be used by either one or two state analyzers at any time. Clock edges can be ORed
together and operate in single phase, two phase demultiplexing, or two phase
mixed mode. Clock edge is selectable as positive, negative, or both edges for each
clock.
Clock Qualifier: The high or low level of four ORed clocks (HP 1650B) or one
clock (HP1651B) can be ANDed with the clock specification. Setup time: 20 ns;
hold time: 5 ns.
Pattern Recognizers: Each recognizer is the AND combination of bit (0, 1, or X)
patterns in each label. Eight pattern recognizers are available when one state
analyzer is on. Four are available to each analyzer when two state analyzers are on.
Range Recognizers: Recognizes data which is numerically between or on two
specified patterns (ANDed combination of 0s and/or 1s). One range term is
available and is assigned to the first state analyzer turned on. The maximum size is
32 bits and on a maximum of 2 pods.
Qualifier: A user-specified term that can be anystate, nostate, a single pattern
recognizer, range recognizer, or logical combination of pattern and range
recognizers.
Sequence Levels: There are eight levels available to determine the sequence of
events required for trigger. The trigger term can occur anywhere in the first seven
sequence levels.
Branching: Each sequence level has a branching qualifier. When satisfied, the
analyzer will restart the sequence or branch to another sequence level.
Occurrence Counter: Sequence qualifier may be specified to occur up to 65535
times before advancing to the next level.
Storage Qualification: Each sequence level has a storage qualifier that specifies
the states that are to be stored.
Enable/Disable: Defines a window of post-trigger storage. States stored in this
window can be qualified.
Prestore: Stores two qualified states that precede states that are stored.
General Information HP 1650B/1651B
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