Technical data

90 16800 Series Portable Logic Analyzers Service Guide
5 Troubleshooting
Memory Signals Test
The purpose of this test is to verify signal integrity and
proper read/write synchronization between the Memory
Controller FPGAs and the acquisition RAM memory devices.
HW Assisted Memory Cell Test
The purpose of this test is to fully check all of the addresses
in all acquisition RAM memory devices.
Memory Unload Modes Test
The purpose of this test is to check the various modes of
unloading data from the acquisition RAM devices. These
modes are setup by writing to registers in the Memory
Controller FPGAs. These FPGAs sequence the data and
perform data decoding based on the mode.
DMA Test
The purpose of this test is to check the various modes of
unloading data from the acquisition RAM memories using
DMA backplane transfers. This test is essentially the same as
the Memory Unload Modes Test except that DMA backplane
transfers are used to read the data from the board.
HW Accelerated Search Test
This test verifies the Memory Controller FPGA- based HW
Accelerated Search function.
Chip Registers Read/Write Test
The purpose of this test is to verify that each writable bit in
each register of the Analysis chips can be written with a 1
and 0 and read back again. The test also verifies that a chip
reset sets all registers to their reset condition (all 0s for
most registers).
LA Chip Calibrations Test
The purpose of this test is to verify that each analysis chip
in the module is able to successfully complete
self- calibration.