Technical data
Index-2 Index
Index
display lamp, 14-12
keypad
, 14-10
rear panel, 14-14
attenuation voltage matrix
, 9-10
aux input (rear panel auxiliary
input)
, 10-29
available options
, 1-6
B
B1 fan assembly
, 14-42
background intensity check for
display
, 6-7
backup EEPROM disk
, 3-33
band (high/low) transition
adjustment
, 3-45
battery
, 14-28
block diagram, 4-21
digital control group
, 6-3
receiver
, 12-28
simplified, 5-4
C
cable inspection
, 6-15
cable locations,power supply
, 5-9
cable test, 9-6
cables
, 13-14, 13-15, 13-16
rear view
, 13-16
calibration certificate, 2-3
calibration coefficient terms and
tests
, 11-7
card cage boards, 14-24
caution-overload on input error
messages
, 8-4
cavity oscillator frequency
correction constants
adjustment
, 3-25
CC procedures
ADC offset (test 52)
, 3-18
analog bus (test 46)
, 3-9
cavity oscillator frequency (test
54)
, 3-25
IF amplifier (test 51)
, 3-16
initialize EEPROM’s (test 58)
,
3-32
option numbers (test 56)
, 3-31
retrieve correction constant data
from EEPROM backup disk
,
3-34
RF output power (test 47)
, 3-11
sampler magnitude (test 53)
,
3-19
source default (test 44), 3-7
source pretune (test 48)
, 3-10
source pretune default (test 45)
,
3-8
unprotected hardware option
numbers
, 3-52
certificate of calibration
, 2-3
chassis parts
, 13-34, 13-36
check
1st LO signal at sampler/mixer
,
8-12
4 MHz REF signal, 8-8
A and B input traces
, 8-4
A1/A2 front panel
, 6-12
A10 by substitution or signal
examination
, 8-9
A11 phase lock
, 7-28
A12 digital control signals, 7-18
A13/A14 Fractional-N
, 7-20
A13/A14 fractional-N
, 7-20
A14 Divide-by-N Circuit Check
,
7-23
A14-to-A13 digital control
signals
, 7-23
A3 source and A11 phase lock
,
7-8
A4 sampler/mixer, 7-8
A7 pulse generator
, 7-25
A9 CPU control
, 6-5
CPU control, 6-5
disk drive
, 4-9
FN LO at A12
, 7-16
front panel cables, 6-15
GPIB systems
, 4-8
operation of A9 CPU control
, 6-5
phase lock error message, 7-6
plotter or printer
, 4-8
the 4 kHz signal
, 8-11
trace with sampler correction
off
, 8-12
YO coil drive with analog bus
,
7-11
comb tooth at 3 GHz
, 7-26
compression test
, 2-58, 2-62
connector care
, 1-5
control problems in s-parameters
test sets
, 9-10
controller GPIB address
, 4-8
controller troubleshooting
, 4-9
conventions, formatting
, 1-iv
correction constants
ADC offset (test 52)
, 3-18
analog bus (test 46)
, 3-9
cavity oscillator frequency (test
54)
, 3-25
display intensity (test 45)
, 6-7
IF amplifier (test 51)
, 3-16
initialize EEPROMs (test 58)
,
3-32
option numbers (test 56), 3-31
retrieval from EEPROM backup
disk
, 3-34
RF output power (test 47), 3-11
sampler magnitude (test 53)
,
3-19
serial number (test 55), 3-30
source default (test 44)
, 3-7
source pretune (test 48)
, 3-10
source pretune default (test 45),
3-8
unprotected hardware option
numbers
, 3-52
counter gate
, 10-39
covers
, 14-6
CPU operation check, 6-5
crosstalk test
, 2-32
D
data incorrect
, 4-18
default correction constants
adjustment for source
, 3-7
adjustment for source pretune
,
3-8
detector
, 10-26
diagnostic
routines for phase lock
, 7-31
tests
, 6-16
diagram
A4 sampler/mixer to phase lock
cable
, 7-8
digital control group
, 6-3
digital control, 4-12
group block diagram
, 6-3
lines observed using L INTCOP
as trigger
, 8-10
signals A14-to-A13 check
, 7-23
signals check
, 7-18
signals generated from A14,
7-24
troubleshooting
, 6-1
digital data lines observed using L
INTCOP as trigger
, 8-10
digital IF
, 10-28
directivity (EDF and EDR)
, 11-9
disk drive
check
, 4-9
external, GPIB address
, 4-8
replacement
, 14-38
display intensity
, 6-7
display test
, 10-13
displayed spurs with a filter
, 3-27
Divide-by-N Circuit Check
, 7-23
documentation map
, 1-iv
dynamic accuracy test
, 2-48
E
ECL reference voltage level
, 10-30
edit list menu, 10-7