User`s guide

1-110
Making Measurements
Using Test Sequencing
The GPIO Mode
The instrument’s parallel port can be used in two different modes. By pressing and
then toggling the softkey, you can select either the mode or the
mode.
The GPIO mode switches the parallel port into a “general purpose input/output” port.
In this mode, the port can be connected to test fixtures, power supplies, and other
peripheral equipment that the analyzer can interact with through test sequencing.
TESTSET I/O
The TESTSET I/O interconnect on the rear panel was originally intended for use solely
with the HP/Agilent 85046A/B and HP/Agilent 85047B external S-parameter test sets.
Since the introduction of the 8753D, a network analyzer with an internal test set, this test
set I/O port has become a general purpose control port for a variety of external devices,
such as the K36 or K39 test adapters and Option 014 configurations. Refer Table 1-6 on
page 1-113 for the definition of each pin of the test set I/O connector.
CAUTION +22 volts is available on the TESTSET I/O connector. Be careful not to
connect this to a printer port or to sensitive electronic equipment.
This connector, with the limit output, TTL OUT and TESTSET I/O outputs can also be
used with part handlers to provide control interface.
The TESTSET I/O bits are set using the and keys
under the keys. The values of the outputs (pins 11, 22, and 23)
are described in Table 1-6. The value changes with the test port, so if the external control
is required for both test port directions, the settings must be made under both
and . This capability can be used to set different
external conditions in a test requiring changes between the forward and reverse
measurements, as might be needed in a high power test, for example.
TTL I/O Menu
This menu can be accessed by pressing in the Sequencing menu.
TTL Output for Controlling Peripherals Eight TTL compatible output lines can be
used for controlling equipment connected to the parallel port. By pressing ,
you will access the following softkeys that control the individual output bits. Refer to
Figure 1-80 for output bus pin locations.
lets you input a number (0 to 255) in base 10 and outputs it to
the bus as binary.
lets you set a single bit (0 − 7) to high on the output bus.
lets you set a single bit (0 − 7) to low on the output bus.
Local
PARALLEL [ ]
[COPY]
[GPIO]
TESTSET I/O FWD
TESTSET I/O REV
Seq
TTL I/O
TTL OUT
TESTSET I/O FWD
TESTSET I/O REV
TTL I/O
Seq
TTL I/O
PARALLEL OUT ALL
SET BIT
CLEAR BIT