Agilent U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes s Agilent Technologies
Notices © Agilent Technologies, Inc. 2007 Manual Part Number No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Agilent Technologies, Inc. as governed by United States and international copyright laws. U7232-97000 Edition First edition, July 2007 Printed in USA Agilent Technologies, Inc.
1 DisplayPort Automated Testing—At A Glance The Agilent U7232A DisplayPort Electrical Performance Compliance Test Application helps you verify DisplayPort Source device under test (DUT) compliance to DisplayPort specifications using an Agilent 8 GHz or greater Infiniium digital storage oscilloscope. The DisplayPort Electrical Performance Compliance Test Application: • Lets you select individual or multiple tests to run. • Lets you identify the device being tested and its configuration.
1 • 1168A or 1169A Probes • Test fixture (W2641A). Includes four SMA to SMP cables. • U7232A DisplayPort Electrical Performance Compliance Test Application license. • N5400A EZJIT Plus Jitter Analysis software license (optional).
1 In This Book This manual describes the tests that are performed by the DisplayPort Electrical Performance Compliance Test Application in more detail; it contains information from (and refers to) the DisplayPort Specification Version 1, and it describes how the tests are performed. • Chapter 1, “Installing the DisplayPort Electrical Performance Compliance Test Application shows how to install and license the automated test application (if it was purchased separately).
1 See Also • The DisplayPort Electrical Performance Compliance Test Application’s online help, which describes: • Creating or opening a test project. • Setting up the DisplayPort test environment. • Selecting tests. • Configuring selected tests. • Connecting the oscilloscope to the DUT. • Running the tests. • Viewing the test results. • Viewing/printing the HTML test report. • Saving test projects. • Understanding the HTML report.
Contents DisplayPort Automated Testing—At A Glance Required Equipment and Software 3 In This Book See Also 3 5 6 1 Installing the DisplayPort Electrical Performance Compliance Test Application Installing the Software 12 Installing the License Key 13 2 Preparing to Take Measurements W2641A Test Fixture 16 Acquiring the Test Fixture 16 W2641A Test Fixture Description Calibrating the Oscilloscope 16 17 Starting the DisplayPort Electrical Performance Compliance Test Application Online Help Topics 18
5 Source Non-ISI Jitter Tests Probing for Non-ISI Jitter Test 42 Non-ISI Jitter Test 45 Test Procedure 45 PASS Condition 49 Test References 49 6 Source Transition Time Tests Probing for Transition Time Tests 52 Source Transition Time Differential Tests Test Procedure 55 PASS Condition 59 Test References 59 55 7 Source No Pre-emphasis Level Verification Testing Probing for No Pre-emphasis Level Verification Testing No Pre-emphasis Level Verification Test Test Procedure 65 PASS Condition 69 Test Refere
Inter-Pair Skew Test 95 Test Procedure 95 PASS Condition 99 Test References 99 11 Source Rise And Fall Time Mismatch Tests Probing for Single-ended Tests 102 Source Rise And Fall Time Mismatch Tests Test Procedure 105 PASS Condition 109 Test References 109 105 12 Source Intra-Pair Skew Tests Probing for Single-Ended Tests 112 Intra-Pair Skew Test 115 Test Procedure 115 PASS Condition 119 Test References 119 13 Source AC Common Mode Noise Tests Probing for AC Common Mode Noise Tests AC Common Mode No
U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 1 Installing the DisplayPort Electrical Performance Compliance Test Application Installing the Software 12 Installing the License Key 13 If you purchased the U7232A DisplayPort Electrical Performance Compliance Test Application separately, you need to install the software and license key.
1 Installing the DisplayPort Electrical Performance Compliance Test Application Installing the Software 1 Make sure you have version A.05.30 or higher of the Infiniium oscilloscope software by choosing Help>About Infiniium... from the main menu. 2 To obtain the DisplayPort Electrical Performance Compliance Test Application, go to Agilent website: http://www.agilent.com/find/scope- apps- sw.
Installing the DisplayPort Electrical Performance Compliance Test Application 1 Installing the License Key 1 Request a license code from Agilent by following the instructions on the Entitlement Certificate. You will need the oscilloscope’s “Option ID Number”, which you can find in the Help>About Infiniium... dialog box. 2 After you receive your license code from Agilent, choose Utilities>Install Option License....
1 14 Installing the DisplayPort Electrical Performance Compliance Test Application U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 2 Preparing to Take Measurements W2641A Test Fixture 16 Calibrating the Oscilloscope 17 Starting the DisplayPort Electrical Performance Compliance Test Application 18 Online Help Topics 20 Before running the DisplayPort automated tests, you need to acquire the appropriate test fixtures, and you should calibrate the oscilloscope and probe.
2 Preparing to Take Measurements W2641A Test Fixture The W2641A test fixture is the Agilent DisplayPort test fixture that is used for all of the DisplayPort compliance tests. Acquiring the Test Fixture The W2641A DisplayPort test fixture can be acquired from Agilent Technologies. W2641A Test Fixture Description Figure 2 shows the top view of the W2641A test fixture.
Preparing to Take Measurements 2 Calibrating the Oscilloscope If you haven’t already calibrated the oscilloscope and probe, see Chapter 14, “Calibrating the Infiniium Oscilloscope and Probe. NOTE If the ambient temperature changes more than 5 degrees Celsius from the calibration temperature, internal calibration should be performed again. The delta between the calibration temperature and the present operating temperature is shown in the Utilities>Calibration menu.
2 Preparing to Take Measurements Starting the DisplayPort Electrical Performance Compliance Test Application 1 From the Infiniium oscilloscope’s main menu, choose Analyze>Automated Test Apps>DisplayPort Test.
2 Preparing to Take Measurements NOTE If DisplayPort Test does not appear in the Automated Test Apps menu, the DisplayPort Electrical Performance Compliance Test Application has not been installed (see Chapter 1, “Installing the DisplayPort Electrical Performance Compliance Test Application). Figure 3 shows the DisplayPort Electrical Performance Compliance Test Application main window.
2 Preparing to Take Measurements Online Help Topics For information on using the DisplayPort Electrical Performance Compliance Test Application, see the online help (which you can access by choosing Help>Contents... from the application’s main menu). The DisplayPort Electrical Performance Compliance Test Application’s online help describes: • Starting the DisplayPort Electrical Performance Compliance Test Application. • To view or minimize the task flow pane. • To view or hide the toolbar.
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 3 Source Eye Diagram Testing Probing for Differential Tests 22 Source Eye Diagram Test 25 This section provides the guidelines for source data eye pattern differential tests using an Agilent 8 GHz or greater Infiniium oscilloscope, 1168A or 1169A probes, and the DisplayPort Electrical Performance Compliance Test Application.
3 Source Eye Diagram Testing Probing for Differential Tests When performing the data eye pattern test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Eye Diagram Testing 3 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
3 Source Eye Diagram Testing . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 6 Probing for Single-ended Tests - Data Eye Pattern Tests using the W2641A DisplayPort Test Fixture You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Eye Diagram Testing 3 Source Eye Diagram Test The eye diagram test provides a visual evaluation of the amplitude and timing variations of the waveform with the overall objective of obtaining a specified Bit Error Rate in transmitted data. The test must use a PRBS7 test pattern at all voltage levels. The test should be performed without pre- emphasis.
3 Source Eye Diagram Testing Navigate to the Eye Diagram - Lane # - Eye Diagram Test where # is the lane number to be tested. Figure 7 Selecting Data Eye Pattern Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 1), run the test and view the test results. Options may vary depending on selected mode: Compliance Mode or Debug Mode.
Source Eye Diagram Testing Table 1 3 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
3 Source Eye Diagram Testing Table 1 Test Configuration Options Configuration Option FFT Acquisition Description Sets the number of acquisitions used for FFT calculations. Source Differential Tests Eye Diagram Eye Diagram Edge Sets the number of edges measured for the eye test. Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test.
Source Eye Diagram Testing Table 1 3 Test Configuration Options Configuration Option Description Spread Spectrum Clock (SSC) SSC Acquisitions Sets the number of acquisitions taken to verify the SSC. Single-ended Tests Rise-Fall Mismatch Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement.
3 Source Eye Diagram Testing Table 2 Eye Diagram Mask Coordinates Bit Rate Mask Point Reduced (1.6 Gb/s) High (2.7 Gb/s) 1 0.102, 0.000 0.159, 0.000 2 0.277, 0.255 0.332, 0.158 3 0.500, 0.318 0.500, 0.198 4 0.723, 0.318 0.668, 0.198 5 0.899, 0.000 0.844, 0.000 6 0.723,-0.318 0.665,-0.198 7 0.500,-0.318 0.500,-0.198 8 0.277,-0.255 0.332,-0.158 3 4 2 1 5 8 7 Figure 8 6 The Source Eye Pattern Mask Mask Test: Zero mask failures. Test References See Test 3.
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 4 Source Total Jitter Tests Probing for Total Jitter Test 32 Total Jitter Differential Test 35 This section provides the guidelines for source total jitter tests using an Agilent 8 GHz or greater Infiniium oscilloscope, InfiniiMax probes, and the DisplayPort Electrical Performance Compliance Test Application.
4 Source Total Jitter Tests Probing for Total Jitter Test When performing the total jitter test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Total Jitter Tests 4 Figure 10 and Figure 11 below show the single- ended and differential connections for the Total Jitter Tests. . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
4 Source Total Jitter Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 11 Probing for Single-ended Tests - Total Jitter Tests using the W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Total Jitter Tests 4 Total Jitter Differential Test To evaluate the total jitter accompanying the data transmission at either an explicit bit error rate of 10- 9 or through an approved estimation technique. This measurement is a data time interval error (Data- TIE) jitter measurement. (Reference: Table 3.13 VESA DisplayPort Standard) The overall system jitter budget allocates different amounts of jitter which each component of the system is allowed to contribute.
4 Source Total Jitter Tests Navigate to the Total Jitter - Lane # - where # is the lane number to be tested. Figure 12 Selecting Total Jitter Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 3), run the test and view the test results. Options may vary depending on selected mode: Compliance Mode or Debug Mode.
Source Total Jitter Tests Table 3 4 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
4 Source Total Jitter Tests Table 3 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Total Jitter Tests Table 3 4 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement. Intra-pair Skew Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
4 40 Source Total Jitter Tests U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 5 Source Non-ISI Jitter Tests Probing for Non-ISI Jitter Test 42 Non-ISI Jitter Test 45 This section provides the guidelines for source non- ISI jitter tests using an Agilent 8 GHz or greater Infiniium oscilloscope, InfiniiMax probes, and the DisplayPort Electrical Performance Compliance Test Application. NOTE Agilent Option 001 (1M/ch memory upgrade) is recommended; this will greatly reduce Jitter test time.
5 Source Non-ISI Jitter Tests Probing for Non-ISI Jitter Test When performing the non- ISI jitter test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Non-ISI Jitter Tests 5 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
5 Source Non-ISI Jitter Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 15 Probing for Single-ended Tests - Non-ISI Jitter Tests (Four Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Non-ISI Jitter Tests 5 Non-ISI Jitter Test To evaluate the Non- ISI jitter accompanying the data transmission at either an explicit bit error rate of 10- 9 or through an approved estimation technique. (Reference: Table 3.13 VESA DisplayPort Standard) The overall system jitter budget allocates different amounts of jitter which each component of the system is allowed to contribute. To exceed any of these limits is to violate the component level jitter budget.
5 Source Non-ISI Jitter Tests Navigate to the Non- ISI Jitter - Lane # - Non- ISI Jitter Test where # is the lane number to be tested. Figure 16 Selecting Data Eye Pattern Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 5), run the test and view the test results. Options may vary depending on selected mode: Compliance Mode or Debug Mode.
Source Non-ISI Jitter Tests Table 5 5 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
5 Source Non-ISI Jitter Tests Table 5 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Non-ISI Jitter Tests Table 5 5 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement. Intra-pair Skew Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
5 50 Source Non-ISI Jitter Tests U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 6 Source Transition Time Tests Probing for Transition Time Tests 52 Source Transition Time Differential Tests 55 This section provides the guidelines for source transition time tests using an Agilent 8 GHz or greater Infiniium oscilloscope, 1168A or 1169A probes, and the DisplayPort Electrical Performance Compliance Test Application.
6 Source Transition Time Tests Probing for Transition Time Tests When performing the transition time test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Transition Time Tests 6 Figure 18 and Figure 19 below show the single- ended and differential connections for Transition Time Tests. . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
6 Source Transition Time Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 19 Probing for Single-ended Tests - Transition Time Tests (Four Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Transition Time Tests 6 Source Transition Time Differential Tests Transition time testing measures the rise time and fall time across the outputs of a differential data lane. The transition is defined as the time interval between the normalized 20% and 80% amplitude levels. The transition time test should be performed at all bit rates supported without pre- emphasis for 400 mV differential voltage swing. The source pattern should be a PRBS7 waveform.
6 Source Transition Time Tests Navigate to the Transition Time group, and check the rise time and fall time tests that you want to perform. Figure 20 Selecting Transition Time Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 7), make oscilloscope connections, run the tests, and view the tests results. Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
Source Transition Time Tests Table 7 6 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
6 Source Transition Time Tests Table 7 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Transition Time Tests Table 7 6 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement. Intra-pair Skew Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
6 60 Source Transition Time Tests U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 7 Source No Pre-emphasis Level Verification Testing Probing for No Pre-emphasis Level Verification Testing 62 No Pre-emphasis Level Verification Test 65 This section provides the guidelines for source no pre- emphasis level verification testing using an Agilent 8 GHz or greater Infiniium oscilloscope, 1168A or 1169A probes, and the DisplayPort Electrical Performance Compliance Test Application.
7 Source No Pre-emphasis Level Verification Testing Probing for No Pre-emphasis Level Verification Testing When performing the no pre- emphasis level verification test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source No Pre-emphasis Level Verification Testing 7 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
7 Source No Pre-emphasis Level Verification Testing . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 23 Probing for Single-ended Tests - No Pre-emphasis Level Verification Tests (Two Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points.
7 Source No Pre-emphasis Level Verification Testing No Pre-emphasis Level Verification Test To evaluate the waveform peak differential amplitude to ensure signal is neither over, nor under driven. (Reference: Table 3.10 VESA DisplayPort Standard) The source is given a range of expected output for each level setting that correlates with the system budget elements such as cable loss and receiver eye minimum and max values. This test ensures that the system budget is obeyed.
7 Source No Pre-emphasis Level Verification Testing . Figure 24 Selecting No Pre-emphasis Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 8), make oscilloscope connections, run the tests, and view the test results. Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
Source No Pre-emphasis Level Verification Testing Table 8 7 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
7 Source No Pre-emphasis Level Verification Testing Table 8 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source No Pre-emphasis Level Verification Testing Table 8 7 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement.
7 70 Source No Pre-emphasis Level Verification Testing U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 8 Source Pre-emphasis Level Verification Testing Probing for Pre-emphasis Level Verification Testing 72 Pre-emphasis Level Verification Test 75 This section provides the guidelines for source pre- emphasis level verification testing using an Agilent 8 GHz or greater Infiniium oscilloscope, 1168A or 1169A probes, and the DisplayPort Electrical Performance Compliance Test Application.
8 Source Pre-emphasis Level Verification Testing Probing for Pre-emphasis Level Verification Testing When performing the pre- emphasis level verification test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Pre-emphasis Level Verification Testing 8 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
8 Source Pre-emphasis Level Verification Testing . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 27 Probing for Single-ended Tests - Pre-emphasis Level Verification Tests (Two Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Pre-emphasis Level Verification Testing 8 Pre-emphasis Level Verification Test This test evaluates the effect of pre- emphasis on the source waveform by measuring the peak differential amplitude and assuring the accuracy of the pre- emphasis setting. (Reference: Table 3.10 VESA DisplayPort Standard) The source can apply pre- emphasize to the waveform in order to overcome the harmful effects caused by such things as system losses through pc boards, connectors, and cables.
8 Source Pre-emphasis Level Verification Testing channels of the oscilloscope. If you are using four connections, connect the four probes to any four channels of the oscilloscope. 4 Connect the SMA to SMP cable to the SMA probe head of one of the probes and to the data lane connector on the W2641A fixture that you want to test. 5 Connect the other SMA to SMP cable to the other SMA probe head and to the data lane on the W2641A test fixture that you want to test.
Source Pre-emphasis Level Verification Testing 8 Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
8 Source Pre-emphasis Level Verification Testing Table 9 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
Source Pre-emphasis Level Verification Testing Table 9 8 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
8 Source Pre-emphasis Level Verification Testing Table 9 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement.
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 9 Source Frequency Accuracy Tests Probing for Frequency Accuracy Tests 82 Frequency Accuracy Test 85 This section provides the guidelines for source frequency accuracy differential tests using an Agilent 8 GHz or greater Infiniium oscilloscope, InfiniiMax probes, and the DisplayPort Electrical Performance Compliance Test Application.
9 Source Frequency Accuracy Tests Probing for Frequency Accuracy Tests When performing the frequency accuracy test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Frequency Accuracy Tests 9 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
9 Source Frequency Accuracy Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 31 Probing for Differential Tests - Frequency Accuracy Tests (Two Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Frequency Accuracy Tests 9 Frequency Accuracy Test The frequency accuracy measurement of the distributed clock network verifies that the nominal operating clock frequency is within the acceptable tolerance range. In order for sink devices to properly recover the data, the source clock must operate within the acceptable tolerance range. The test must be made at all bit rates supported by the device under test without pre- emphasis and a voltage swing of 1.2 volts. A test pattern of D10.
9 Source Frequency Accuracy Tests Navigate to the Frequency Accuracy group, and check the lanes that you want to perform. Figure 32 Selecting Transition Time Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 10), make oscilloscope connections, run the tests, and view the tests results. Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
Source Frequency Accuracy Tests 9 Table 10 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
9 Source Frequency Accuracy Tests Table 10 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Frequency Accuracy Tests 9 Table 10 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement. Intra-pair Skew Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
9 Source Frequency Accuracy Tests PASS Condition Frequency Accuracy = Nominal Frequency ±300 ppm. Test References See Test 3.9: Frequency Accuracy, in the DisplayPort- Compliance Test Specification Version 1.
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 10 Source Inter-Pair Skew Tests Probing for Inter-Pair Skew Single-ended Tests 92 Inter-Pair Skew Test 95 This section provides the guidelines for source inter- pair skew single- ended tests using an Agilent 8 GHz or greater Infiniium oscilloscope, InfiniiMax probes, and the DisplayPort Electrical Performance Compliance Test Application.
10 Source Inter-Pair Skew Tests Probing for Inter-Pair Skew Single-ended Tests When performing the inter- pair skew test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Inter-Pair Skew Tests 10 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
10 Source Inter-Pair Skew Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 35 Probing for Single-ended Tests - Inter-Pair Skew Tests (Two Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
Source Inter-Pair Skew Tests 10 Inter-Pair Skew Test The inter- pair skew test evaluates the skew, or time delay, between respective differential data lanes in the DisplayPort interface. (Reference Table 3.10 VESA DisplayPort Standard) The DisplayPort interface has the ability to skew, or deskew lanes by 20 UI (Unit Intervals) which is as much as 12ns (1.62Gb/s) and is intended to eliminate simultaneous degradation of concurrent bytes of transmitted data.
10 Source Inter-Pair Skew Tests Navigate to the Inter- pair Skew Test group, and check the rise time and fall time tests that you want to perform. Figure 36 Selecting Transition Time Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 11), make oscilloscope connections, run the tests, and view the tests results. Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
Source Inter-Pair Skew Tests 10 Table 11 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
10 Source Inter-Pair Skew Tests Table 11 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Inter-Pair Skew Tests 10 Table 11 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement. Intra-pair Skew Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
10 Source Inter-Pair Skew Tests 100 U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 11 Source Rise And Fall Time Mismatch Tests Probing for Single-ended Tests 102 Source Rise And Fall Time Mismatch Tests 105 This section provides the guidelines for source transition time tests using an Agilent 8 GHz or greater Infiniium oscilloscope, 1168A or 1169A probes, and the DisplayPort Electrical Performance Compliance Test Application.
11 Source Rise And Fall Time Mismatch Tests Probing for Single-ended Tests When performing the transition time test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Rise And Fall Time Mismatch Tests 11 Figure 38 and Figure 39 below show the single- ended and differential connections for Transition Time Tests. . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
11 Source Rise And Fall Time Mismatch Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 39 Probing for Single-ended Tests - Rise and Fall Time Mismatch Tests (Four Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
11 Source Rise And Fall Time Mismatch Tests Source Rise And Fall Time Mismatch Tests The rise and fall time mismatch tests evaluate the difference in rise and fall times of the two single- ended waveform in a given differential data lane of a DisplayPort interface. (Reference Table 3.10 VESA DisplayPort Standard specification.) The mismatch in time of the rising and falling time of the single- ended signals composing a differential lane will create common mode noise and will radiate.
11 Source Rise And Fall Time Mismatch Tests Navigate to the Rise- Fall Mismatch group, and check the Rising Mismatch and Falling Mismatch tests that you want to perform. Figure 40 Selecting Rise And Fall Time Mismatch Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 12), make oscilloscope connections, run the tests, and view the tests results.
11 Source Rise And Fall Time Mismatch Tests Table 12 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
11 Source Rise And Fall Time Mismatch Tests Table 12 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Rise And Fall Time Mismatch Tests 11 Table 12 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement.
11 Source Rise And Fall Time Mismatch Tests 110 U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 12 Source Intra-Pair Skew Tests Probing for Single-Ended Tests 112 Intra-Pair Skew Test 115 This section provides the guidelines for source intra- pair skew tests using an Agilent 8 GHz or greater Infiniium oscilloscope, InfiniiMax probes, and the DisplayPort Electrical Performance Compliance Test Application.
12 Source Intra-Pair Skew Tests Probing for Single-Ended Tests When performing the intra- pair skew test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source Intra-Pair Skew Tests 12 . Infiniium Oscilloscope N5380A SMA probe head. Connect the plus side of the probe to the plus side of the SMA probe head and the negative side of the probe to the negative side of the SMA probe head.
12 Source Intra-Pair Skew Tests . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 43 Probing for Single-ended Tests - Inter-Pair Skew Tests (Two Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points. You select the channels used for test a lane in the Set Up tab of the DisplayPort Electrical Performance Compliance Test Application.
12 Source Intra-Pair Skew Tests Intra-Pair Skew Test The intra- pair skew test evaluates the skew, or time delay, between respective sides of a differential data lane in a DisplayPort interface. (Reference Table 3.10 VESA DisplayPort Standard) Intra- pair skew has deleterious effects on signal rise time and manner of crossing through the transition point. The DisplayPort specification at package pins (TP1) is 20 ps. It can clearly double or triple to and through the connector.
12 Source Intra-Pair Skew Tests Navigate to the Intra- Pair Skew group, and check the lane you want to test. Figure 44 Selecting Intra-pair Skew Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 13), make oscilloscope connections, run the tests, and view the tests results. Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
12 Source Intra-Pair Skew Tests Table 13 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
12 Source Intra-Pair Skew Tests Table 13 Test Configuration Options Configuration Option Description Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test. Interpolation (Debug only) Specifies whether to turn On or Off the Sin(x)/x interpolation filter. Turning On interpolation may cause more peak-to-peak jitter. Eye Diagram Mask Movement (Debug only) This field contains 4 options.
Source Intra-Pair Skew Tests 12 Table 13 Test Configuration Options Configuration Option Description Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement. Lower Threshold (Debug only) Sets the lower threshold used to make a rise time or fall time measurement. Intra-pair Skew Intra-pair Edge Sets the number of edges measured for the intra-pair skew test.
12 Source Intra-Pair Skew Tests 120 U7232A DisplayPort Compliance Testing Notes
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 13 Source AC Common Mode Noise Tests Probing for AC Common Mode Noise Tests 122 AC Common Mode Noise Test 124 This section provides the guidelines for source AC common mode noise differential tests using an Agilent 8 GHz or greater Infiniium oscilloscope, InfiniiMax probes, and the DisplayPort Electrical Performance Compliance Test Application.
13 Source AC Common Mode Noise Tests Probing for AC Common Mode Noise Tests When performing the AC common mode noise test, the DisplayPort Electrical Performance Compliance Test Application will prompt you to make the proper connections. Your DisplayPort test environment setup on the Set Up tab must match the physical connection. There are two modes that you can use to configure the Set Up tab: Wizard Mode and Manual Mode.
Source AC Common Mode Noise Tests 13 Figure 46 shows a physical connection for making single- ended connections. 2641A . Infiniium Oscilloscope DUT SMA to SMP cables Data Channel Lane on the W2641A test fixture Figure 46 Probing for Single-ended Tests - AC Common Mode Noise Tests (Two Connections with W2641A DisplayPort Test Fixture) You can use any of the oscilloscope channel and connect them to any of the lane test points.
13 Source AC Common Mode Noise Tests AC Common Mode Noise Test The AC common mode noise measurement of the distributed clock network verifies that the nominal operating clock frequency is within the Acceptable tolerance range. In order for sink devices to properly recover the data, the source clock must operate within the Acceptable tolerance range. The test must be made at all bit rates supported by the device under test without pre- emphasis and a voltage swing of 1.2 volts. A test pattern of D10.
Source AC Common Mode Noise Tests 13 Navigate to the AC Common Mode group, and check the rise time and fall time tests that you want to perform. Figure 47 Selecting Transition Time Differential Tests 8 Follow the DisplayPort Electrical Performance Compliance Test Application’s task flow to set up configuration options (see Table 14), make oscilloscope connections, run the tests, and view the tests results. Options may vary depending on the selected mode: Compliance Mode or Debug Mode.
13 Source AC Common Mode Noise Tests Table 14 Test Configuration Options Configuration Option Description Clock Recovery Clock Recovery Order Set either a second order PLL or a first order PLL method is used to recover the clock. Clock Recovery Loop Bandwidth Sets the 3 dB bandwidth of the loop filter used by the PLL. Clock Recovery Damping Factor Sets the damping factor which is the value that is used in designing the second order PLL that is used to recover the clock.
Source AC Common Mode Noise Tests 13 Table 14 Test Configuration Options Configuration Option FFT Acquisition Description Sets the number of acquisitions used for FFT calculations. Source Differential Tests Eye Diagram Eye Diagram Edge Sets the number of edges measured for the eye test. Mask Scaling Option Sets the type of scaling performed on the mask for the eye test. Mask Type Selects the type of mask to use for the eye test.
13 Source AC Common Mode Noise Tests Table 14 Test Configuration Options Configuration Option Description Spread Spectrum Clock (SSC) SSC Acquisitions Sets the number of acquisitions taken to verify the SSC. Single-ended Tests Rise-Fall Mismatch Rise-Fall Mismatch Edge Sets the number of edges measured for the rise-fall mismatch test. Upper Threshold (Debug only) Sets the upper threshold used to make a rise time or fall time measurement.
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 14 Calibrating the Infiniium Oscilloscope and Probe Required Equipment for Calibration 130 Internal Calibration 131 Probe Calibration and De-skew 135 This chapter describes the Agilent Infiniium digital storage oscilloscope calibration procedures.
14 Calibrating the Infiniium Oscilloscope and Probe Required Equipment for Calibration To calibrate the Infiniium oscilloscope in preparation for running the DisplayPort automated tests, you need the following equipment: • Keyboard, qty = 1, (provided with the Agilent Infiniium oscilloscope). • Mouse, qty = 1, (provided with the Agilent Infiniium oscilloscope). • Precision 3.5 mm BNC to SMA male adapter, Agilent p/n 54855- 67604, qty = 2 (provided with the Agilent Infiniium oscilloscope).
Calibrating the Infiniium Oscilloscope and Probe 14 Internal Calibration This will perform an internal diagnostic and calibration cycle for the oscilloscope. For the Agilent oscilloscope, this is referred to as Calibration. This Calibration will take about 20 minutes. Perform the following steps: 1 Set up the oscilloscope with the following steps: a Connect the keyboard, mouse, and power cord to the rear of the oscilloscope.
14 Calibrating the Infiniium Oscilloscope and Probe 3 Referring to Figure 49 below, perform the following steps: a Click on the Utilities>Calibration menu to open the Calibration window. Figure 49 Accessing the Calibration Menu. 4 Referring to Figure 50 below, perform the following steps to start the calibration: a Uncheck the Cal Memory Protect checkbox. b Click the Start button to begin the calibration.
14 Calibrating the Infiniium Oscilloscope and Probe Figure 50 Oscilloscope Calibration Window 5 Follow the on- screen instructions: a You will be prompted to disconnect everything from all the inputs: click the OK button. b Then you will be prompted to connect the calibration cable with SMA adapters between the Aux Out and a specified input. Install the SMA adapter by pressing it on input BNC, and hand tightening the outer ring turning right. Click the OK button after connecting the cable as prompted.
14 Calibrating the Infiniium Oscilloscope and Probe Figure 51 Time Scale Calibration Dialog box d Click on the Std + Dflt button to continue the calibration, using the Factory default calibration factors. e When the calibration procedure is complete, you will be prompted with a Calibration Complete message window. Click the OK button to close this window. f Confirm that the Vertical and Trigger Calibration Status for all Channels passed. g Click the Close button to close the calibration window.
Calibrating the Infiniium Oscilloscope and Probe 14 Probe Calibration and De-skew Before performing DisplayPort tests you should calibrate and de- skew the probes. SMA probe head Atten/Offset Calibration 1 Referring to Figure 52 below, perform the following steps: a Ensure that a probe, attached with SMA probe head is connected to Channel 1. Install the 82 Ω resistors into the SMA probe head. Connect the de- skew fixture to Aux Out. Clip the resistors on de- skew fixture.
14 Calibrating the Infiniium Oscilloscope and Probe Figure 53 Channel Dialog Box 136 U7232A DisplayPort Compliance Testing Notes
Calibrating the Infiniium Oscilloscope and Probe 14 2 Referring to Figure 54 below, perform the following steps: a Click the Add Head... button, and then select E2678A:DF Sckt from the list of Head Type. Select OK to close the dialog box. Figure 54 Probe Setup Window.
14 Calibrating the Infiniium Oscilloscope and Probe 3 Referring to Figure 55 below, perform the following steps: a Click on the Calibrate Probe button to open the Probe Calibration window. Figure 55 User Defined Probe Window. 4 Referring to Figure 56 and perform the following steps: a Select the Calibrated Atten/Offset Radio Button b Click the Start Atten/Offset Calibration Button to open the Calibration window.
Calibrating the Infiniium Oscilloscope and Probe 14 Figure 56 Probe Calibration Window. c Follow the on- screen instructions. d At the end of the Atten/Offset Calibration perform the Skew Calibration. Differential Probe Head Skew Calibration This procedure ensures that the timing skew errors between channels are minimized. Perform the following steps: 1 Referring to Figure 57 below, perform the following steps: a Select the Start Skew Calibration button and follow the on- screen instructions.
14 Calibrating the Infiniium Oscilloscope and Probe manual comes together with the E2655A/B De- skew Kit, that came with your oscilloscope. Figure 57 De-skew Connection. NOTE Each probe is calibrated to the oscilloscope channel to which it is connected. Do not switch probes between channels or other oscilloscopes, or it will be necessary to calibrate them again. It is recommended that the probes are labeled with the channel on which they were calibrated.
Calibrating the Infiniium Oscilloscope and Probe 14 the Aux Out of the oscilloscope. Do not connect the negative (- ) side of the InfiniiMax probe amp to anything.
14 Calibrating the Infiniium Oscilloscope and Probe f Click on the Setup>Channel 1 menu to open the Channel Setup window. Figure 59 Channel Setup Window g Click the Probes button in the Channel Setup window, to open the Probe Setup window.
Calibrating the Infiniium Oscilloscope and Probe 14 Figure 60 Channel Dialog Box U7232A DisplayPort Compliance Testing Notes 143
14 Calibrating the Infiniium Oscilloscope and Probe 2 Referring to Figure 61 below, perform the following steps: a Click the Add Head... button, and then select N5380A:DF SMA from the list of Head Type. Select OK to close the dialog box. Figure 61 Probe Setup Window. b Click on the Calibrate Probe button to open the Probe Calibration window.
Calibrating the Infiniium Oscilloscope and Probe 14 Figure 62 Probe Calibration Window. c Follow the on- screen instructions. d At the end of the Atten/Offset Calibration perform the Skew Calibration. SMA Probe Head Skew Calibration This procedure ensures that the timing skew errors between channels are minimized. Perform the following steps: 1 Referring to Figure 63 below, perform the following steps: a Select the Start Skew Calibration button and follow the on- screen instructions.
14 Calibrating the Infiniium Oscilloscope and Probe manual comes together with the E2655A/B De- skew Kit, that came with your oscilloscope. Figure 63 De-skew Connection.
U7232A DisplayPort Electrical Performance Compliance Test Application Compliance Testing Notes 15 InfiniiMax Probing Figure 64 1169A InfiniiMax Probe Amplifier Agilent recommends the N5380A SMA probe head and the N5380A differential SMA probe head.
15 InfiniiMax Probing Table 15 Probe Head Characteristics 148 Probe Head Model Number Differential Measurement (BW, input C, input R) Single-Ended Measurement (BW, input C, input R) Differential socket E2678A 7 GHz, 0.34 pF, 50 kOhm 7 GHz, 0.
Index A P AC common mode noise tests, 121 precision 3.
Index 150 U7232A DisplayPort Compliance Testing Notes
www.agilent.com Agilent Technologies, Inc. 2007 First edition, July 2007 This part is not orderable.
