User`s guide

Using the Logic Analyzer

The Inverse Assembler

The particular sequences that each label requires depends on the type

of chip the inverse assembler was designed for. Because of this, inverse

assemblers cannot generally be transferred between platforms.

To run the inverse assembler, you must be sure the labels are spelled

correctly as shown here, or as directed in your inverse assembler

documentation. Even a minor difference such as not capitalizing each

letter will cause the inverse assembler to not work.

Inverse Assembly Synchronization

When you press the Invasm key to begin inverse assembly of a trace,

the inverse assembler begins with the first displayed state in the trace

list. This is called synchronization. It looks at the status bits (STAT)

and determines the type of processor operation, which is then

displayed under the STAT label. If the operation is an opcode fetch, the

inverse assembler uses the information on the data bus to look up the

corresponding opcode in a table, which is displayed under the DATA

label. If the operation is a data transfer, the data and corresponding

operation are displayed under the DATA label. This continues for all

subsequent states in the trace list.