User`s guide

126 Chapter 8
Limit Test
Sample Program
Line 700 Sets channel 1's active trace to trace 1.
Lines 720 to 730 These lines store trace 1's measurement parameter and data format into
the variables Param1$ and Fmt1$, respectively.
Lines 750 to 810 These lines set up the limit table for trace 1.
Line 750: Sends the command that sets up a limit table along with
the Num_of_seg1 variable that contains the number of segments.
Lines 770 to 790: Sends five data items (type, start point stimulus
value, end point stimulus value, start point response value, and end
point response value) for each segment.
Lines 820 to 830 These lines turns on the display of limit lines and the Limit Test
feature for trace 1.
Line 870 Sets channel 1's active trace to trace 2.
Lines 890 to 900 These lines set trace 2's measurement parameter and data format to
Param2$ and Fmt2$, respectively.
Lines 920 to 980 These lines set up the limit table for trace 2.
Lines 990 to 1000 These lines turns on the display of limit lines and the Limit Test
feature for trace 2.
Lines 1040 to 1060 These lines set, under the questionable limit channel 1 status register,
the enable register and positive transition filter to 6
(0000000000000110 in binary notation) while setting the negative
transition filter to 0 so that the questionable limit status condition
register's bit 1 is set to 1 when the test result that combines the results
for trace 1 and trace 2 is “fail”.
NOTE The sample program provides an example of explicitly configuring the register bits so that
they reflect the test result that only covers trace 1 and trace 2. However, because the results
for traces 3 to 9 will never be “fail” as long as the Limit Test feature is disabled for those
traces, the register bits would reflect the test result that is limited to traces 1 and 2 even if
you did not change the default setting.
Lines 1070 to 1080 These lines set transition filters so that the questionable limit status
event register's bit 1 is set to 1 when the questionable limit status
condition register's bit 1 changes from 0 to 1.
Line 1090 Clears the questionable limit status event register and questionable
limit channel 1 status event register.
Lines 1110 to 1130 These lines trigger the instrument, and waits until the sweep cycle
completes.
Lines 1170 to 1190 These lines retrieve the value of the questionable limit status event
register, and store the setting of bit 1 of the value into Ch1_judge.
Lines 1200 to 1230 These lines retrieve the value of the questionable limit channel 1
status event register, and store the settings of bit 1 and bit 2 of the
value into Tr1_judge and Tr2_judge, respectively.
Line 1280 Displays a message indicating that the DUT has passed the limit test if
the test result for channel 1 is “Pass” (i.e., if Ch1_judge returns 0).
Lines 1300 to 1660 These lines are executed if the test result for channel 1 is “Fail” (i.e., if