Technical data
490 Chapter 18
T1 Analyzer
Making T1 Measurements
T1 Analyzer
to be tested for BERT.
• Fill Data: When performing Channel BERT testing this configures the source of
data transmitted in the unused slots. For drop-and-insert testing this field is
typically set to Secondary Rx.
— All 1’s - Set this mode to maintain a sufficient 1s density on the unused
channels during testing. All 1s are typically transmitted on unused channels
in live T1 circuits.
— Idle - Set this mode to accommodate specific troubleshooting such as to
exercise a circuit designed for B8ZS.
— Primary Rx - Fills the unused slots with Primary Rx data.
— Secondary Rx - Fills the unused slots with Secondary Rx data.
• Loop Code: Selects the format of the transmitted code when a loop-up or
loop-down is requested.
— ESF Datalink - Loopback state change requests are sent to the far end in the
framing pattern in the ESF datalink channel. Note that this mode is possible
when only ESF is selected for the framing pattern.
— In-band - Loopback state change requests are sent to the far end by
replacing the normal channel data with the loop code. Note that in this mode
the code must persist for 5 seconds for the far end to respond
• Slip Reference: Selects the reference for the frame slip measurement.
— None - This selection disables the frame slip measurement.
— Internal - In this mode the test set compares the framing of the incoming
signal with the test set's internal clock. Three conditions are necessary when
using this mode: the far end must be receiving a signal from this test set, the
transmit clock on the far end must be configured to synchronize on the
incoming signal, and the Tx Clock on this test set must be set to
Internal.
Internal is the default selection after test set preset and covers the situation
when a hard loop is configured at the far end. If a separate test set is used at
each end, then the test set on one end should have the Tx Clock set to
Primary Rx (Assuming the incoming signal is connected to this jack.)
Another alternative is to use a second T1 circuit connected to the Secondary
Rx jack to establish proper timing.
— Second Rx - In this mode the test set compares the frame clock timing of the
received signal on the Primary Rx jack with the frame clock timing of the
received signal on the Secondary Rx jack.