user manual
Table Of Contents
- Agilent Technologies 16750A/B Logic Analyzer
- Agilent Technologies 16750A/B Logic Analyzer
- Contents
- Getting Started
- Step 1. Connect the logic analyzer to the device under test
- Step 2. Choose the sampling mode
- Step 3. Format labels for the probed signals
- Step 4. Define the trigger condition
- Step 5. Run the measurement
- Step 6. Display the captured data
- For More Information...
- Example: Timing measurement on counter board
- Example: State measurement on counter board
- Task Guide
- Probing the Device Under Test
- Choosing the Sampling Mode
- To select transitional timing or store qualified
- Formatting Labels for Logic Analyzer Probes
- Setting Up Triggers and Running Measurements
- Displaying Captured Data
- Using Symbols
- Printing/Exporting Captured Data
- Cross-Triggering
- Solving Logic Analysis Problems
- Saving and Loading Logic Analyzer Configurations
- Reference
- The Sampling Tab
- The Format Tab
- Importing Netlist and ASCII Files
- The Trigger Tab
- The Symbols Tab
- Error Messages
- Must assign Pod 1 on the master card to specify actions for flags
- Branch expression is too complex
- Cannot specify range on label with clock bits that span pod pairs
- Counter value checked as an event, but no increment action specified
- Goto action specifies an undefined level
- Maximum of 32 Channels Per Label
- Hardware Initialization Failed
- Must assign another pod pair to specify actions for flags
- No more Edge/Glitch resources available for this pod pair
- No more Pattern resources available for this pod pair
- No Trigger action found in the trace specification
- Slow or Missing Clock
- Timer value checked as an event, but no start action specified
- Trigger function initialization failure
- Trigger inhibited during timing prestore
- Trigger Specification is too complex
- Waiting for Trigger
- Analyzer armed from another module contains no "Arm in from IMB" event
- Specifications and Characteristics
- Concepts
- Understanding Logic Analyzer Triggering
- Understanding State Mode Sampling Positions
- Getting Started
- Glossary
- Index
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Chapter 3: Reference
Error Messages
resources).
• An inequality compare (<,<=,>,>=) with a split label pattern event
requires 2 combiner resources.
• A range on a split label pattern event requires 4 combiner resources.
• The event list in the custom store qualification dialog also allocates
combiner resources from the same pool of 16 resources. If the store
qualification event list equation is the same as one of the branch event list
equations in the trigger sequence, the combiner resource will be shared. A
unique store qualification event list requires the allocation of 1 (or more)
of the combiner resources.
• 333/400/800/1250 MHz state modes requires many more combiner
resources to implement the same trigger sequence as compared to 167/200
MHz state modes and all timing modes. Refer the discussion of complexity
in the Branch expression is too complex help topic.
Waiting for Trigger
This message indicates that the specified trigger pattern has not
occurred. This may be expected, as when you are waiting to trigger on
an unusual event.
Possible Causes
• Misaligned boundaries for addresses
When the device under test is a microprocessor that fetches only from
long-word aligned addresses, if the trigger is set to look for an opcode
fetch at an address that is not properly aligned, the trigger will never be
found.
• Trigger set incorrectly
Some strategies you can use when verifying or debugging trigger
sequence levels are:
• Look at the run status message line or open the Run Status window. It will
tell you what level of the sequence the logic analyzer is in.
• Stop the measurement and look at the data that was captured. This is