User guide

Chelsea Technologies Group
FAST
tracka
User Guide HB179 Issue 7.0
Page
37
of
47
sequence, and this discrete information is stored sequentially on video speed SRAM as a linear
array of 10-bit datapoints covering the entire flash sequence duration.
After the flash sequence is completed, the FAST
tracka
microcontroller reads the discrete data
from the SRAM and parses it into a series of numbers corresponding to the integrated signal
(either fluorescence or excitation) for the 0-nn saturation + decay flashes. Each digitised
datapoint is of 10 bit range (i.e. 0 to 1023), and thus an integrated flash often will give values
ranging around 3000 to 4000, as a microsecond flash can be sampled roughly 8 times at 125
nanosecond clocking.
Consequently, for a one microsecond flash (saturation flashlet duration = 4), an integrated
number which exceeds 8000 should be considered spurious. If a PMT signal under such a
protocol exceeds 8000, then each digitised signal must be close or equal to 1024, which is the
upper limit of the 10 bit converter (the FAST
tracka
10 bit converters represent a 0-4 volt signal as
a digitised value ranging from 0- 1023). In this case, the PMT gain should be reduced in the
protocol. It is preferred to have the PMT (emission) signal high enough to use the most dynamic
range of the instrument, but not too high so that in some cases clipping occurs.
5.5 SOFTWARE MODIFICATIONS, V0.1 TO V1.0.0
The changes noted here serve to inform the user as to which changes have been implemented
in both system software and hardware for the FAST
tracka
instrument for which this manual is
designed.
1. Magnet Switch Operation: The system hardware and software has been modified to
accept a magnet switch instruction to issue a wakeup request and begin autoacquire.
PL 6500-A issue instruments (running V0.1 software) precluded AutoAcquire mode from
being executed on magnet switch wakeup, and could only be executed by attaching the
Host cable.
2. Intelligent Shutdown: Magnet switch requests for shutdown in PL 6500-B hardware
(running V0.2 software) first are relayed to the main microprocessor. Within a 10 second
window, the main processor may complete its present task and signal proper shutdown
before being switched by the PIC system controller. PL 6500-A hardware (running V0.1
software) implemented direct shutdown and did not allow task completion.
3. Battery Monitor: PL 6500-B hardware (running V0.1 software) did not allow the user to
monitor the charge state of the battery pack, if attached. PL 6500-B hardware (running
V0.2 software) allows the user to actively monitor the battery voltage level in real time
through the System Setup menu when the instrument is powered by battery only. The
System Voltage field has been replaced with Battery Voltage.
4. Wakeup Dates & Times: V0.2 software allows the user to selectively delete
programmed wakeup dates and times in Programmed Acquire menu.
5. Internal Clock: V0.1 software has an error in setting the internal clock properly in certain
circumstances.
6. System History Information: V0.2 software improved system functioning by
implementing system history tables, Main Menu option 4. When errors occur, they are
passed to an error handler which stores a time-stamped error code in NVRAM for later
inspection.