Schematics

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A
A
GPIO4
S/W
Reset
button
1.35V
IPQ40x8-0
14x14mm DR-QFN
180 pins
2.4GHz/2x2/11b/g/n/ac
16bit DDR3L
48MHz XTAL
1.35V
VDD33
CHIP
_PWD_L
MPQ8632
DC +12V/2A
input
6A
3.3V
USB3.0/2.0
Port1
3A
MP1495
2.4GHz FEM
3A
MP1495
5V
DVDD11
resistors
0.625V
PSGMII
MDC / MDIO
QCA8075
4.7uH
LX
1.2V
25MHz XTAL
Giga Ethernet
PHY
64M x 16bits
Giga Ethernet PHY (Malibu)
USB2.0
FEM_1_R0
FEM_1_R1
5 GHz/2x2/11ac
FEM_0_R0
FEM_0_R1
Vref
UART
EJTAG
SPI NOR Flash
16MB SO8
SPI NAND Flash
1Gbits WSON8
VDD25_REG
MP1495
3A
1.1V
xformer
WAN
RJ-45
PoE
xformer
WAN
RJ-45
TPS23754
POE PD
GPIO62
S/W
Reset
FMA-HW01008-01 R01
π-LPF
5G_TX_1
Match
π-LPF
5G_RX_1
Match
π-LPF
LNA
PA
LPF
HPF
5G
Coupler
HPF
LPF
5G
Coupler
LPF
(LTCC)
LPF
(LTCC)
PA
LNA
Pdet
Pdet
2G_TX_1
Match
π-LPF
π-LPF
2G_RX_1
Match
LNA
PA
LPF
HPF
HPF
LPF
PA
LNA
2.4G
Coupler
2.4G
Coupler
Pdet
Pdet
BPF
(LTCC)
BPF
(LTCC)
2G_TX_0
Match
2G_RX_0
Match
5G_TX_0
Match
5G_RX_0
Match
π-LPF
π-LPF
π-LPF
UFL
Conn.
UFL
Conn.
TPM & PHY & BLE
3A
3.5V
MP1653
5 GHz FEM
Model Name
Size
Page Name
Rev
teehS:etaD of
Engineer
R01
D
1 17Monday, January 16, 2017
01_BLOCK DIAGRAM
Model Name
Size
Page Name
Rev
teehS:etaD of
Engineer
R01
D
1 17Monday, January 16, 2017
01_BLOCK DIAGRAM
Model Name
Size
Page Name
Rev
teehS:etaD of
Engineer
R01
D
1 17Monday, January 16, 2017
01_BLOCK DIAGRAM

Summary of content (13 pages)