Specifications
EVALPFC-3kW-IPZ65R019C7
9
Application Note AN 2014-06
V1.1 January 2015
is possible to optimize this fan between noise generation and cooling effect by changing the changeable
resistor R28 nearby the fan for the bridge rectifier.
The main heat sink for the DUT offers cooling and heating functionality in parallel. For heating up the heat
sink to target temperature (standard setting=60°C) it is necessary to
remove the external connection from KL01 GND to Vout_sense GND
Change the setting of Jumper J11 from “Intern” to “Extern”.
Supply galvanic isolated 12V to connector KL01 between GND and +12V with current limit of 1A
Supply 17V to connector KL01 “Heating” with current limitation of 3.5A
The control circuit will than heat up the heat sink to the adjusted temperature which can be changed by the
changeable resistor R3 and once the temperature is reached it will start the fan to cool again. So it is
possible to operate the Application with regulated heat sink temperature for the MOSFET and the DIODE.
4 Circuit Operation
4.1 Soft Startup
During power up when the V
OUT
is less than 96% of the rated level, internal voltage loop output increases
from initial voltage under the soft-start control. This results in a controlled linear increase of the input current
from 0A thus reducing the current stress in the power components.
Once V
OUT
has reached 96% of the rated level, the soft-start control is released to achieve good regulation
and dynamic response and VB_OK pin outputs 5V indicating PFC output voltage in normal range.
4.2 Gate Switching Frequency
The switching frequency of the PFC converter can be set with an external resistor R
FREQ
at pin FREQ with
reference to pin SGND. The voltage at pin FREQ is typical 1V. The corresponding capacitor for the oscillator
is integrated in the device and the R
FREQ
/frequency is given in Figure 2. The recommended operating
frequency range is from 21 kHz to 250 kHz. As an example, a R
FREQ
of 43kΩ at pin FREQ will set a switching
frequency F
SW
of 100 kHz typically.