Instruction manual

Prosilica GC Technical Manual V2.1.0
70
Camera data path
Prosilica GC750C
Figure 58: Block diagram for Prosilica GC750C
HIROSE I/O
RS232
Sensor
Analog
Analog
ADC
10 bit
Analog
Analog
Gain
Horizontal
binning*
Vertical
binning* /
Vertical ROI
10 bit
Gigabit
Ethernet
interface
10 bit
White balance
Oset
‡
8 bit
8/10 bit
Bayer
†
Interpolation
3 X 3
Frame
memory
‡
Factory calibrated. NOT a user control.
†
For on-camera interpolated PixelFormats only—outputs 8 bit.
Raw un-interpolated PixelFormats skip this block—outputs 10 bit.
GigE
10 bit
Horizontal
ROI
Camera control
*
Color information lost while binning is active.