Instruction manual
Guppy Technical ManualV7.4.0
109
Description of the data path
The following flow diagram illustrates the defect pixel correction:
Figure 64: Defect pixel correction: build and store
Note
While building defect pixel correction data or uploading them
from host, the defect pixel correction data are stored volatile
in FPGA.
Optional you can store the data in EEPROM non-volatile (Set
MemSave to 1).
Note
Configuration
To configure this feature in an advanced register: See Table
115: Advanced register: Defect pixel correction on page 243.