Manual
Preliminary
9
AIP900-0012-B0-001 Rev. A (01/2012)
1.2 Theory of operation
Please refer to the power circuit block diagram on the following page for a theory of operation of
theACSHPswitchedmodeAC-DCconversionsystem.The187-312VAC,50/60Hzinputisfed
throughacircuitbreakerintoafullwaverectier,whichinturnprovidesa120Hz(340Vpeak)
pulsetraintoaninputltercircuit.Theinputlterprovidesanominal290VDC"rawsupply",with
approximately30VP-P120Hzripple,tothetransistorswitchingcircuit.Thetransistorswitching
circuit“chops”therawsupplyintoa525VP-P,100kHz(nominal)rectangularwaveformwith
a nominal 66% duty cycle. This high frequency switching waveform is then fed into a ferrite
powertransformer,inwhichthewaveformis“steppeddown”andisolated.Arectiercircuitthen
converts the power transformer output to a DC pulse train with a nominal 160 V peak. Next, a
two-stageoutputlteraveragesandsmoothesthispulsetraindownward,providingthenominal
125VDCoutputwithlownoise.Avoltageerrorampliercircuitsensestheoutputvoltageand
compares it with the voltage reference to provide a voltage error signal. Similarly, a current error
amplier,usingashuntresistorandscalingamplier,sensestheoutputcurrentandcompares
it with the desired maximum output current, in order to provide a current error signal. These
signals are then fed into the pulse width modulator (PWM) via ORing circuitry so that either
voltageorcurrentregulationisachieved.ThePWMcontrolsthe"ON"timeoftheswitching
transistors,varyingtheoutputascommandedbytheerrorampliers.ThePWMalsosensesthe
switching transistor current on an instantaneous basis to provide cycle-by-cycle protection of the
switchingtransistors.Anauxiliarysupply,poweredviaasmall50/60Hztransformer,andaDC/
DC converter power the control circuit and front panel circuitry. The PWM receives the ON/OFF
command and clock signal from the front panel circuit and control circuitry.
1.0 Introduction