User manual

Chapter 5 Parameter Introductions
FDT lag
Time
Time
FDT level
Output Freq.
FDT signal
Fig. 5-3-9 FDT level and lag diagram
P3.21 Frequency upper limit arriving output delay
time
Range: 0.0～100.0s【0.0s】
P3.22 Frequency lower limit arriving output delay
time
Range: 0.0～100.0s【0.0s】
Note:
◆For 35R5GB/37R5PB and the above models: function of P3.13
～ P3.17 will be
D0,Y1,Y2.Relay 1and relay 2 outputs have been set as 4 (FDTH: Frequency upper
limit arriving) or 5 (FDTL: Frequency lower limit arriving).
◆For 3004GB and the below models: function of P3.13 and P3.16 will be D0 .Relay
output has been set as 4 (FDTH: Frequency upper limit arriving) or 5 (FDTL:
Frequency lower limit arriving).
◆Usually ,this Function is valid to avoid load wobbling and signal instability when
several motors switch between commercial frequency and conversion frequency, as
shown in Fig. 5-3-10.
Operating Freq.(Hz)
Frequency
upper limit
FDTH
Time
FDTL
Frequency
lower limit
FDTH Delay time EDTL Delay time
Fig. 5-3-10 FDTH/FDTL diagram
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