Specifications
Chapter 2: Board Components 2–57
On-Board Memory
© March 2009  Altera Corporation Cyclone III 3C120 Development Board Reference Manual
Figure 2–15 and Figure 2–16 show the Samsung device read and write access 
waveforms, respectively. 
Figure 2–15.  SRAM Read Timing Waveforms
0 1 2 3 4 5 6 7 8  9  10  11  12  13  14 
Data Out 
OE 
UB, LB 
CS 
ADDR 
ADV 
CLK 
WAIT 
Figure 2–16.  SRAM Write Timing Waveforms
0 1 2 3 4 5 6 7 8  9  10  11  12  13  14 
Data In 
WE 
UB, LB 
CS 
ADDR 
ADV 
CLK 
WAIT 










