User manual

Hardware Description Languages
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Describes digital hardware, the logic elements it is made of, how
they are connected and how they are clocked.
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Used for design,design verification and synthesis (implementation).
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Maps a hardware description into bit streams used to configure a
FPGA.
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Two main HDL languages, (System)Verilog and VHDL.
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SystemVerilog is modeled after C. Makes assumptions, can be
criticized as helping (in effect) when making mistakes.
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VHDL is (sort of) Ada like. Makes you be very precise. Often
criticized as to leading to verbose code.
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The world is about half (System)Verilog and half VHDL.
Verilog/SystemVerilog is used in EECS 452.
EECS 452 – Fall 2014 Lecture 5 – Page 26/143 Tuesday – September 16, 2014