User manual

Verilog’s operators part 2
binary arithmetic operators integral, ,
% binary arithmetic modulus operator integral
& | ^ ^~ ~^ binary bit-wise operators integral
>> << binary logical shift operators integral
>>> <<< binary arithmetic shift operators integral
&& ||
-> <->
binary logical operators integral, real, shortreal
< <= > >= binary relational operators integral, real, shortreal
=== !== binary case equality operators any except real and
shortreal
== != binary logical equality operators any
==? !=? binary wildcard equality operators integral
++ -- unary increment, decrement operators integral, real, shortreal
inside binary set membership operator singular for the left operand
dist
a
a
The operator is described in
16.15.2 (Assume statement) and 18.5.4 (Distribution).
binary distribution operator integral
{} {{}} concatenation, replication operators integral
{<<{}} {>>{}} stream operators integral
From IEEE Standard 1800-2009.
EECS 452 – Fall 2014 Lecture 5 – Page 63/143 Tuesday – September 16, 2014