User manual

Need a fast D/A?
Assuming that the VGA DAC is not being used to generate a VGA
display it can be used as up to a three channel DAC.
A standard 640 × 480 display pixel clock rate is 25 MHz. DAC
clock rates of up to around 75 MHz likely are possible. Consult
the data sheet.
RSE T
VGA_G9
VGA_G0
VGA_G8
VGA_G7
VGA_G6
VGA_G5
VGA_G4
VGA_G3
VGA_G2
VGA_G1
VGA_R0 VGA_R1 VGA_R2 VGA_R3 VGA_R4 VGA_R5 VGA_R6 VGA_R7 VGA_R8
VGA_B9 VGA_B8 VGA_B7 VGA_B6 VGA_B5 VGA_B4 VGA_B3 VGA_B2 VGA_B1 VGA_B0
VGA_R9
VGA_B
VGA_R
VGA_G
VGA_BLANK_n
VGA_R[0..9]
VGA_G[0..9]
VGA_B[0..9]
VGA_SYNC_n
VGA_CLOCK
VGA_HS
VGA_VS
VGA_VCC33
VGA_VCC33
VGA_VCC33
VGA_VCC33
VCC33 VGA_VCC33
BC47
0.1u
BC47
0.1u
R84
75
R84
75
10
11
6
1
5
15
J 7
VGA
10
11
6
1
5
15
J 7
VGA
5
9
4
8
3
7
2
6
1
17 16
10
11
12
13
14
15
R80 4.7KR80 4.7K
BC49 0.1uBC49 0.1u
R86 47R86 47
R82
75
R82
75
BC48
0.1u
BC48
0.1u
R81 560R81 560
R83
75
R83
75
R85 47R85 47
U10
ADV7123
U10
ADV7123
G6
7
SYNC
12
G1
2
G2
3
B7
21
B8
22
B9
23
CLOCK
24
GND
25
GND
26
IOB
27
IOB
28
B3
17
B4
18
B5
19
B6
20
B2
16
B1
15
B0
14
VAA
13
G0
1
G3
4
BLANK
11
G9
10
G4
5
G5
6
G7
8
G8
9
VAA
29
VAA
30
IOG
31
IOG
32
IOR
33
IOR
34
COMP
35
VREF
36
RSET
37
PSAVE
38
R0
39
R1
40
R2
41
R3
42
R4
43
R5
44
R6
45
R7
46
R8
47
R9
48
EECS 452 – Fall 2014 Lecture 5 – Page 81/143 Tuesday – September 16, 2014
From the DE2-70 schematics PDF file.