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Sine generation using an array
reg [15:0] sine_table [15:0];
initial begin
sine_table[0] = 0;
sine_table[1] = 12539;
sine_table[2] = 23170;
sine_table[3] = 30273;
sine_table[4] = 32767;
sine_table[5] = 30273;
sine_table[6] = 23170;
sine_table[7] = 12539;
sine_table[8] = 0;
sine_table[9] = -12539;
sine_table[10] = -23170;
sine_table[11] = -30273;
sine_table[12] = -32767;
sine_table[13] = -30273;
sine_table[14] = -23170;
sine_table[15] = -12539;
end
always@(negedge clock)
counter <= counter + FTV;
always @(
*
)
dataOut = sine_table[counter[9:6]];
EECS 452 – Fall 2014 Lecture 5 – Page 85/143 Tuesday – September 16, 2014