User manual

DE2 User Manual
63
On the transmitting side, the Nios II processor sends 64-byte packets every 0.5 seconds to the
DM9000A. After receiving the packet, the DM9000A appends a four-byte checksum to the packet
and sends it to the Ethernet port.
On the receiving side, the DM9000A checks every packet received to see if the destination MAC
address in the packet is identical to the MAC address of the DE2 board. If the packet received does
have the same MAC address or is a broadcast packet, the DM9000A will accept the packet and send
an interrupt to the Nios II processor. The processor will then display the packet contents in the Nios
II IDE console window.
Figure 5.9. Packet sending and receiving using the Nios II processor.
Demonstration Setup, File Locations, and Instructions
Project directory: DE2_NET
Bit stream used: DE2_NET.sof
Nios II Workspace: DE2_NET
Plug a CAT5 loop-back cable into the Ethernet connector of DE2
Load the bit stream into the FPGA
Run the Nios II IDE under the workspace DE2_NET
Click on the Compile and Run button
You should now be able to observe the contents of the packets received (64-byte packets
sent, 68-byte packets received because of the extra checksum bytes)
Figure 5.10 illustrates the setup for this demonstration.