Specifications

Figure 6-3: DQS Pins and DLLs in Cyclone V GX (C3) Devices
DQS
Pin
DQS
Pin
DQS
Pin
DQS
Pin
to IOE
to IOEto IOE
to IOE
ΔtΔtΔtΔt
DLL
Reference
Clock
Δt
Δt
Δt
Δt
DQS Logic
Blocks
DLL
Reference
Clock
DLL
to
IOE
to
IOE
to
IOE
to
IOE
DLL
DQS
Pin
DQS
Pin
DQS
Pin
DQS
Pin
DLL
Reference
Clock
DLL
Δt
Δt ΔtΔt
DQS Logic
Blocks
to
IOE
to
IOE
to
IOE
to
IOE
DQS
Pin
DQS
Pin
DQS
Pin
DQS
Pin
Transceiver Blocks
Altera Corporation
External Memory Interfaces in Cyclone V Devices
Send Feedback
6-15
DQS Phase-Shift Circuitry
CV-52006
2013.05.06