Specifications

• JTAG Secure Mode on page 7-34
• AN 425: Using the Command-Line Jam STAPL Solution for Device Programming
• Cyclone V Device Datasheet
Provides more information about the JTAG configuration timing.
• JTAG Boundary-Scan Testing in Cyclone V Devices
• Programming Support for Jam STAPL Language
• USB-Blaster Download Cable User Guide
• ByteBlaster II Download Cable User Guide
• EthernetBlaster Communications Cable User Guide
• EthernetBlaster II Communications Cable User Guide
JTAG Single-Device Configuration
To configure a single device in a JTAG chain, the programming software sets the other devices to the bypass
mode. A device in a bypass mode transfers the programming data from the TDI pin to the TDO pin through
a single bypass register. The configuration data is available on the TDO pin one clock cycle later.
The Quartus II software can use the CONF_DONE pin to verify the completion of the configuration process
through the JTAG port:
•
CONF_DONE pin is low—indicates that configuration has failed.
•
CONF_DONE pin is high—indicates that configuration was successful.
After the configuration data is transmitted serially using the JTAG TDI port, the TCK port is clocked an
additional 1,222 cycles to perform device initialization.
To configure a Cyclone V device using a download cable, connect the device as shown in the following figure.
Configuration, Design Security, and Remote System Upgrades in Cyclone V Devices
Altera Corporation
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CV-52007
JTAG Single-Device Configuration
7-24
2013.06.11