Specifications

Altera Corporation 8–57
October 2007 Nios II Processor Reference Handbook
initd
initd
initialize data cache line
Operation: Initializes the data cache line associated with address rA + σ (IMM16).
Assembler Syntax:
initd IMM16(rA)
Example:
initd 0(r6)
Description:
initd computes the effective address specified by the sum of rA and the signed 16-
bit immediate value. Ignoring the tag,
initd identifies the data cache line associated
with the effective address, and then
initd invalidates that line.
If the Nios II processor core does not have a data cache, the
initd instruction
performs no operation.
Usage: The instruction is used to initialize the processor’s data cache. After processor reset
and before accessing data memory, use
initd to invalidate each line of the data
cache.
For more information on data cache, see the Cache and Tightly-Coupled Memory
chapter of the Nios II Software Developer's Handbook.
Instruction Type: I
Instruction Fields: A = Register index of operand rA
IMM16 = 16-bit signed immediate value
313029282726252423222120191817161514131211109876543210
A 0 IMM16 0x33