Specifications

Altera Corporation 8–71
October 2007 Nios II Processor Reference Handbook
mul
mul
multiply
Operation:
rC
←
(rA × rB)
31..0
Assembler Syntax:
mul rC, rA, rB
Example:
mul r6, r7, r8
Description: Multiplies rA times rB and stores the 32 low-order bits of the product to rC. The result
is the same whether the operands are treated as signed or unsigned integers.
Nios II processors that do not implement the
mul instruction cause an
unimplemented-instruction exception.
Usage: Carry Detection (unsigned operands):
Before or after the multiply operation, the carry out of the MSB of rC can be detected
using the following instruction sequence:
mul rC, rA, rB
mulxuu rD, rA, rB
cmpne rD, rD, r0
; The mul operation (optional)
; rD is non-zero if
carry occurred
; rD is 1 if carry occurred, 0 if not
The mulxuu instruction writes a non-zero value into rD if the multiplication of unsigned
numbers will generate a carry (unsigned overflow). If a 0/1 result is desired, follow the
mulxuu with the cmpne instruction.
Overflow Detection (signed operands):
After the multiply operation, overflow can be detected using the following instruction
sequence:
mul rC, rA, rB
cmplt rD, rC, r0
mulxss rE, rA, rB
add rD, rD, rE
cmpne rD, rD, r0
; The original mul operation
; rD is non-zero if overflow
; rD is 1 if overflow,
0 if not
The cmplt–mulxss–add instruction sequence writes a non-zero value into rD if the
product in rC cannot be represented in 32 bits (signed overflow). If a 0/1 result is
desired, follow the instruction sequence with the
cmpne instruction.
Instruction Type: R
Instruction Fields: A = Register index of operand rA
B = Register index of operand rB
C = Register index of operand rC
313029282726252423222120191817161514131211109876543210
ABC0x2700x3a