User guide
7–6 Chapter 7: Custom PHY IP Core
Parameter Settings
Altera Transceiver PHY IP Core March 2012 Altera Corporation
User Guide
Word Alignment
The word aligner restores word boundaries of received data based on a predefined 
alignment pattern. This pattern can be 7, 8, 10, 16, 20, or 32 bits long. The word 
alignment module searches for a programmed pattern to identify the correct 
boundary for the incoming stream. Table 7–5 lists the settings available on the Word 
Aligner tab.
Table 7–5. Word Aligner Options
Name Value Description
Word alignment mode
Manual
You can select 1 of the following 3 modes:
■ Manual–In this mode you enable the word alignment function by 
asserting 
rx_enapatternalign
 using the Avalon-MM interface. 
When the PCS exits reset, the word aligner automatically performs 
an initial alignment to the specified word alignment pattern. After 
the initial alignment, you must assert 
rx_enapatternalign 
to 
initiate another pattern alignment. 
rx_enapatternalign
 is edge 
sensitive. 
Bit slipping 
■ Bit slipping–You can use bit slip mode to shift the word boundary 
using the Avalon-MM interface. For every rising edge of the 
rx_bitslip
 signal, the word boundary is shifted by 1 bit. Each bit 
slip removes the earliest received bit from the received data. 
Automatic 
synchronization 
state machine
■ Automatic synchronization state machine–In this mode, word 
alignment is controlled by a programmable state machine. This 
mode can only be used with 8B/10B encoding. The data width at 
the word aligner can be 10 or 20 bits. You can specify the following 
parameters: 
■ Number of consecutive valid words before sync state is 
reached: Specifies the number of consecutive valid words 
needed to reduce the built up error count by 1. Valid values are 
1–256.
■ Number of bad data words before loss of sync state: Specifies 
the number of bad data words required for alignment state 
machine to enter loss of sync state. Valid values are 1–256.
■ Number of valid patterns before sync state is reached: 
Specifies the number of consecutive patterns required to 
achieve synchronization. Valid values are 1–256.
■ Create optional word aligner status ports: When enabled the 
rx_syncstatus
 and 
rx_patterndetect
 status ports are 
created.
■ Word alignment pattern length: Allows you to specify a 7- or 
10-bit pattern for use in the word alignment state machine.
■ Word alignment pattern: Allows you to specify a word 
alignment pattern.
Enable run length violation 
checking
On/Off
If you turn this option on, you can specify the run length which is the 
maximum legal number of contiguous 0s or 1s. 
Run length 40–640 Specifies the threshold for a run-length violation.










