User guide
Chapter 1: Introduction 1–3
PMA
March 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
PMA
The PMA receives and transmits differential serial data on the device external pins. 
The transmit (TX) channel supports programmable pre-emphasis and programmable 
output differential voltage (V
OD
). It converts parallel input data streams to serial data. 
The receive (RX) channel supports offset cancellation to correct for process variation 
and programmable equalization. It converts serial data to parallel data for processing 
in the PCS. The PMA also includes a clock data recovery (CDR) module with separate 
CDR logic for each RX channel. 
Reset Controller
A transceiver reset controller is included as part of each PHY IP core. This embedded 
reset controller ensures reliable transceiver link initialization. The reset controller 
initializes the both the TX and RX channels. You can disable the automatic reset 
controller in the Custom and Low Latency Transceiver PHYs. If you do disable the 
embedded reset controller, the powerdown, analog and digital reset signals for both 
the TX and RX channels are top-level ports of the transceiver PHY. You can use these 
signals to design a custom reset sequence. 
To accommodate different reset requirements for different transceivers in your design, 
instantiate multiple instances of a PHY IP core. For example, if your design includes 
20 channels of the Custom PHY IP core with 12 channels running a custom protocol 
using the automatic reset controller and 8 channels requiring manual control of RX 
reset, instantiate 2 instances of the Custom PHY IP core and customize one to use 
automatic mode and the other to use your own reset logic. For more information, refer 
to “Enable embedded reset control” in Table 7–3 on page 7–3. 
f For more information about reset in Stratix V devices, refer to Transceiver Reset Control 
in Stratix V Devices in volume 3 of the Stratix V Device Handbook, for Stratix IV devices, 
refer to Reset Control and Power Down in volume 4 of the Stratix IV Device Handbook.
Avalon-MM PHY Management
You can use the Avalon-MM PHY Management module to read and write the control 
and status registers in the PCS and PMA. This module includes both Avalon-MM 
master and slave ports and acts as a bridge. It transfers commands received from an 
embedded controller on its slave port to its master port. The Avalon-MM PHY 
management master interface connects the Avalon-MM slave ports of PCS and PMA 
registers and the Transceiver Reconfiguration module, allowing you to manage these 
Avalon-MM slave components through a simple, standard interface. (Refer to 
Figure 1–1 on page 1–2.)










