User guide

Chapter 10: Transceiver Reconfiguration Controller 10–17
ATX PLL Calibration
March 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
Table 10–16 describes the AEQ registers that you can access to change AEQ settings.
1 All undefined register bits are reserved and must be set to 0.
Refer to “Changing Transceiver Settings Using Register-Based Reconfiguration” on
page 10–27 for the procedures you can use to control AEQ.
ATX PLL Calibration
This feature allows you to rerun ATX calibration after power up. The Transceiver
Reconfiguration Controller automatically runs ATX calibration at power up.
1 You may need to rerun ATX calibration if you reset an ATX PLL and it does not lock
after the specified lock time.
7’h2A
[9] R
control and status
Error
. When asserted, indicates an error. This bit is asserted
when the channel address is invalid.
[8] R
Busy . When asserted, indicates that a reconfiguration
operation is in progress.
[1] W
Read . Writing a 1 to this bit triggers a read operation.
[0] W
Write . Writing a 1 to this bit triggers a write operation.
7’h2B [3:0] RW
aeq_offset
Specifies the address of the AEQ register to be read or
written. Refer to Table 10–16 for details.
7’h2C [15:0] RW
data Specifies the read or write data.
Table 10–15. AEQ Registers (Part 2 of 2)
Recon
-fig
Addr
Bits R/W Register Name Description
Table 10–16. AEQ Offsets and Values
Offset Bits R/W Register Name Description
Default
Value
0x0
[8] R
adapt_done
When asserted, indicates that adaptation has
completed.
1b’0
[1:0] RW
mode
Specifies the following address modes:
■ 2’b00: Low power manual equalization mode
■ 2’b01: One-time AEQ adaptation at power up
■ 2’b10: Perform continuous AEQ adaptation
■ 2’b11: Reserved
2’b00
0x2 [3:0] R
equalization
results
This is the value set by the automatic AEQ
adaptation performed at startup. If you choose to
perform manual equalization using the linear
equalizer, you can use this value as a reference.
Although automatic and manual equalization do not
provide identical functionality, specifying this value
enables manual equalization to approximate the
original setting.
0x0000